iMX51 boot failures

SteM — Mon, 16 Jul 2012 16:35:31 GMT

Hi @all,
iMX51 board booting WinCE600R3, BSP based on Freescale one.
We enabled the registry hive and ROM+RAM FS.

If i save the registry into a folder in RAM [SDMemory MountAsBootable=0 MountAsRoot=0, ObjectStore MountAsBootable=1 MountAsRoot=1] (even if it is hive registry), i have no problem.

If i change the settings to save the registry into SdMemory [SDMemory MountAsBootable=1 MountAsRoot=0, and ObjectStore MountAsBootable=0 MountAsRoot=1] my image sometimes run, sometimes stop with the message:
FILESYS: Waiting for bootable file system to be mounted.

The percentage of failure is almost 50%.
If I lower the frequency into the bootloader to 7.5MHz, the percentage is low but there are too many times with the problem.

Please, have you any advise/application note/doc to solve this problem??

Thanks

Re: iMX51 boot failures

qiang_li-mpu_se — Fri, 20 Jul 2012 09:32:22 GMT

Attached is an example to enable BINFS, HIVEREG and ROM only filesystem on SDMMC card, BSP is based on WINCE5.0 ER1104 IMX51 BSP. Maybe you can reference to it for your HIVEREG case.

Re: iMX51 boot failures

huzizhen — Tue, 19 Mar 2013 03:07:35 GMT

hi Liqiang:

I have a same program to use hive-base registy for wince6 on imx51.when i set ,i can not boot. i see your reply, so i want to test it .

I used your Attach files to build a bin.and download it by mfgtool sucessed .but when it boot,many error msg and can not into wince os .pls give me some advice. and i only modifty IMGCOMPRESSALL=1 because your files not set.

and your readme have some msg: xip.nb0 and eboot.nb0 are instead of nk.nb0 and eboot.nb0 and xldr.nb0.

but your ucl.xml still have xldr.nb0 to download to sdmmc，why?

the attach files is my config.

see follow msg.

Freescale iMX SOC Menu Item (UNSAVED CHANGES)

-----------------------------------------------------------------------------

[0] IP Address : 0.0.0.0

[1] Set IP Mask : 0.0.0.0

[2] Boot Delay : 3

[3] DHCP : Enabled

[4] Reset to Factory Default Configuration

[5] Select Boot Device : NK from SD/MMC

[6] Set MAC Address : FF-FF-FF-FF-FF-FF

[7] Format OS NAND Region

[8] Format All NAND Regions

[9] Bootloader Shell

[I] KITL Work Mode : Interrupt

[K] KITL Enable Mode : Disable

[P] KITL Passive Mode : Disable

[S] Save Settings

[D] Download Image Now

[L] Launch Existing Flash Resident Image Now

[E] Select Ether Device : FEC

[M] MMC and SD Utilities

Selection: l

INFO: Storing boot configuration to SDHC

INFO: Successfully stored boot configuration to SDHC

-BLMenu .

INFO: Using device name: 'MX5165535'

INFO: Reading NK image to SDHC (please wait)...

Card Capacity 1967616 (Kbytes)

Successfully created 3 partitions

Boot Partition size = 767 Kbytes, startSect = 0x2, totSect = 0x5fe.

BINFS Partition size = 32768 Kbytes, startSect = 0x600, totSect = 0x10000

File System Partition size = 1934080 Kbytes, startSect = 0x10600, totSect = 0x3b0600

INFO: Copying NK image to RAM address 0xa0200000

INFO: Copying NK image size 0x300000 BYTEs.

INFO: Read is 8% complete

INFO: Read is 16% complete

INFO: Read is 25% complete

INFO: Read is 33% complete

INFO: Read is 41% complete

INFO: Read is 50% complete

INFO: Read is 58% complete

INFO: Read is 66% complete

INFO: Read is 75% complete

INFO: Read is 83% complete

INFO: Read is 91% complete

INFO: Read is 100% complete

INFO: Copy of NK completed successfully

Download successful! Jumping to image at 0x0 (physical 0x90200000)...

INFO:OALLogSetZones: dpCurSettings.ulZoneMask: 0xb

BSP Clock Configuration:

CKIH = 22579200 Hz

PLL1 = 800000000 Hz

PLL2 = 665000000 Hz

PLL3 = 216000000 Hz

LP_APM = 24000000 Hz

ARM = 800000000 Hz

AXI_A = 166250000 Hz

AXI_B = 133000000 Hz

EMI_SLOW = 133000000 Hz

AHB = 133000000 Hz

IPG = 66500000 Hz

PERCLK = 8000000 Hz

CKIL_SYNC = 32768 Hz

DDR = 200000000 Hz

ARM_AXI = 166250000 Hz

IPU_HSP = 133000000 Hz

VPU_AXI = 166250000 Hz

GPU = 166250000 Hz

GPU2D = 166250000 Hz

DEBUG_APB = 166250000 Hz

ENFC = 26600000 Hz

USBOH3 = 66500000 Hz

ESDHC1 = 47500000 Hz

ESDHC2 = 47500000 Hz

ESDHC3 = 47500000 Hz

ESDHC4 = 47500000 Hz

UART = 24000000 Hz

SSI1 = 5644800 Hz

SSI2 = 5644800 Hz

SSI3 = 5644800 Hz

SSI_EXT1 = 10285714 Hz

SSI_EXT2 = 10285714 Hz

USB_PHY = 24000000 Hz

TVE_216_54 = 216000000 Hz

DI = 27000000 Hz

VPU_RCLK = 24000000 Hz

SPDIF0 = 1142857 Hz

SPDIF1 = 1142857 Hz

SLIMBUS = 66500000 Hz

SIM = 66500000 Hz

FIRI = 24000000 Hz

HSI2C = 66500000 Hz

SSI_LP_APM = 22579200 Hz

SPDIF_XTAL = 24000000 Hz

HSC1 = 216000000 Hz

HSC2 = 216000000 Hz

ESC = 15428571 Hz

CSI_MCLK1 = 24629629 Hz

CSI_MCLK2 = 24629629 Hz

ECSPI = 66500000 Hz

LPSR = 0 Hz

PGC = 66500000 Hz

OSC = 24000000 Hz

CKIH_CAMP1 = 22579200 Hz

CKIH2_CAMP2 = 0 Hz

CKIH2 = 0 Hz

FPM = 33554432 Hz

Windows CE Kernel for ARM (Thumb Enabled) Built on May 7 2012 at 12:47:43

INFO:OALLogSetZones: dpCurSettings.ulZoneMask: 0xb

+OEMInit

OEMInit: silicon rev = 0x20

BoardID = 0x0.

+OEMInit before kitl init,fffc7ffd,ffffffff

[KITL] ++OALKitlInit()hu

pDevice->type............ 2

WARN: OALKitlInit: KITL Disabled

OALIoCtlHalInitRTC(2006/1/1 12:0:0.000)