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    <title>i.MX ProcessorsのトピックRe: Camera capture at same time through IC and directly to memory</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Camera-capture-at-same-time-through-IC-and-directly-to-memory/m-p/427109#M64792</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Basically it is possible (to have the both paths working at the same time).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;According to section 37.4.3.1 (CSI Block Diagram) of the i.MX6 DQ Reference Manual :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;“The CSI gets data from the sensor […] and transfer it according to configuration of DATA_DEST&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;register to one or more of the following: IC, SMFC.” Bit field DATA_DEST allows setting both &lt;BR /&gt; destination IC and SMFC simultaneously. Please take a look at section 37.5.151 [CSI0 Sensor &lt;BR /&gt; Configuration Register (IPUx_CSI0_SENS_CONF)]&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Nevertheless, I am afraid, practically it is not simple job to implement this approach, since &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;in any case finally AXI bus (via IDMAC) is destination for all data. You may look at Figure 37-1 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;(IPU Block Diagram) and Figure 37-2 (IPU Detailed Block Diagram).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Oct 2015 02:50:55 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2015-10-29T02:50:55Z</dc:date>
    <item>
      <title>Camera capture at same time through IC and directly to memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Camera-capture-at-same-time-through-IC-and-directly-to-memory/m-p/427108#M64791</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear experts,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am wondering if the following is possible.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;iMX6 is connected to a single CMOS sensor, e.g. 1080p.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it possible to have both paths working at the same time:&lt;/P&gt;&lt;P&gt;CSI -&amp;gt; MEM&lt;/P&gt;&lt;P&gt;CSI -&amp;gt; IC -&amp;gt; MEM&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, for every frame, I can get the original image from the sensor (CSI-&amp;gt;MEM)&amp;nbsp; + a downscaled image (CSI-&amp;gt;IC-&amp;gt;MEM) ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can iMX6 support such a configuration in theory?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sincerely,&lt;/P&gt;&lt;P&gt;Erez&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Oct 2015 09:42:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Camera-capture-at-same-time-through-IC-and-directly-to-memory/m-p/427108#M64791</guid>
      <dc:creator>erezsteinberg</dc:creator>
      <dc:date>2015-10-26T09:42:28Z</dc:date>
    </item>
    <item>
      <title>Re: Camera capture at same time through IC and directly to memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Camera-capture-at-same-time-through-IC-and-directly-to-memory/m-p/427109#M64792</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Basically it is possible (to have the both paths working at the same time).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;According to section 37.4.3.1 (CSI Block Diagram) of the i.MX6 DQ Reference Manual :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;“The CSI gets data from the sensor […] and transfer it according to configuration of DATA_DEST&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;register to one or more of the following: IC, SMFC.” Bit field DATA_DEST allows setting both &lt;BR /&gt; destination IC and SMFC simultaneously. Please take a look at section 37.5.151 [CSI0 Sensor &lt;BR /&gt; Configuration Register (IPUx_CSI0_SENS_CONF)]&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Nevertheless, I am afraid, practically it is not simple job to implement this approach, since &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;in any case finally AXI bus (via IDMAC) is destination for all data. You may look at Figure 37-1 &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;(IPU Block Diagram) and Figure 37-2 (IPU Detailed Block Diagram).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2015 02:50:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Camera-capture-at-same-time-through-IC-and-directly-to-memory/m-p/427109#M64792</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-10-29T02:50:55Z</dc:date>
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