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    <title>topic Re: i.MX6 reset question in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-reset-question/m-p/425842#M64525</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Please refer to Chapter 60 [System Reset Controller (SRC)] of the i.MX6 &lt;BR /&gt; DQ Reference Manual about reset signals of the i.MX6.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;In particular Figure 60-5 (SRC inputs and outputs) shows input reset events.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;All of them reset both ARM (including buses) and IPU.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 13 May 2015 03:30:33 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2015-05-13T03:30:33Z</dc:date>
    <item>
      <title>i.MX6 reset question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-reset-question/m-p/425841#M64524</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;OL style="list-style-type: lower-alpha;"&gt;&lt;LI&gt;Will ARM core-reset reset AXI bus?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;OL style="list-style-type: lower-alpha;"&gt;&lt;LI&gt;Is IPU reset necessary if ARM core is reset?&lt;/LI&gt;&lt;/OL&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 May 2015 00:56:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-reset-question/m-p/425841#M64524</guid>
      <dc:creator>jamesdavis</dc:creator>
      <dc:date>2015-05-13T00:56:42Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 reset question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-reset-question/m-p/425842#M64525</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Please refer to Chapter 60 [System Reset Controller (SRC)] of the i.MX6 &lt;BR /&gt; DQ Reference Manual about reset signals of the i.MX6.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;In particular Figure 60-5 (SRC inputs and outputs) shows input reset events.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;All of them reset both ARM (including buses) and IPU.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 May 2015 03:30:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-reset-question/m-p/425842#M64525</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-05-13T03:30:33Z</dc:date>
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