i.MX ProcessorsのトピックRe: RMII interface on i.MX6SX

RMII interface on i.MX6SX

Richard1z — Mon, 20 Jul 2015 02:38:38 GMT

I wish to use a LAN8720 (RMII) with the iMX6SX.

The IMX6SXHDG does not cover the Ethernet Interface at all.

The SX Reference Manual covers it very badly:

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SXRM.pdf?fasp=1

1) My main problem is how to generate the RMII clock for the LAN8720.

The IMX6DQ6SDLHDG outlines how it is done for S/D/L processors (see below), by using GPIO_16.

Does this apply to iMX6SX devices too ?

2) The following screenshots show my connections between LAN8720 and iMX6SX.

Do they seem correct ?

Re: RMII interface on i.MX6SX

BiyongSUN — Mon, 20 Jul 2015 03:01:26 GMT

1. change the device tree to set the pin ctrl correctly . Especially loop back the clock.

#define MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x0090 0x03D8 0x0760 0x11 0x1

2. change the device tree to set the fec correctly. using rmii

3. Using 50M for RMII

arch/arm/mach-imx/clk-imx6sx.c

imx_clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 50000000);

4. Add phy fix up for LAN8720 as ar8031 does

193 #define PHY_ID_AR8031 0x004dd074

194 static void __init imx6sx_enet_phy_init(void)

195 {

196 if (IS_BUILTIN(CONFIG_PHYLIB))

197 phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,

198 ar8031_phy_fixup);

199 }

200

Re: RMII interface on i.MX6SX

robyf — Mon, 20 Jul 2015 18:03:32 GMT

Hi Sun,

can you please note that the reference clock is connected to ENET2_RX_CLK, do you think looks ok?

Currently I'm going to patch our custom board under uboot-imx with this pinmux.

/* mx6sx_pins.h */

MX6SX_PAD_ENET2_RX_CLK__ENET2_RX_CLK = IOMUX_PAD(0x03E4, 0x009C, 0 | IOMUX_CONFIG_SION, 0x0000, 0, NO_PAD_CTRL)

/* board pinmux */

#define GPIO_FEC1_PHY_RESET IMX_GPIO_NR(2, 7)

static iomux_v3_cfg_t const fec1_pads[] = {

MX6SX_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 | MUX_PAD_CTRL(NO_PAD_CTRL),

MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_ENET2_RX_CLK__ENET2_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),

MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 | MUX_PAD_CTRL(ENET_PAD_CTRL),

};

Thanks in advance,

Roberto Fichera.

Re: RMII interface on i.MX6SX

BiyongSUN — Fri, 24 Jul 2015 06:09:52 GMT

Which BSP you are using?

i.MXSX is L3.10.53_1.1.0 and later.

Re: RMII interface on i.MX6SX

robyf — Fri, 24 Jul 2015 08:07:31 GMT

I'm using yocto fido fully updated. u-boot is imx version.

Re: RMII interface on i.MX6SX

BiyongSUN — Fri, 24 Jul 2015 11:25:05 GMT

If you use the freescale release. Now the pin is handled by device tree.

Could not have the following array to configure the iomux.

Please use the freescale BSP.