topic Re: About leak voltage by USB VBUS timing in i.MX6DQ. in i.MX Processors

About leak voltage by USB VBUS timing in i.MX6DQ.

keitanagashima — Wed, 03 Jun 2015 00:59:39 GMT

Dear All,

Hello.

I have a question about leak voltage by USB VBUS timing in i.MX6DQ.

Refer to attached file.

And, please answer to me.

Best Regards,

Keita

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

karina_valencia — Tue, 09 Jun 2015 16:25:10 GMT

AvenTsao are you able to help here?

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

aven_tsao — Fri, 12 Jun 2015 08:53:22 GMT

Hi Keita:

Q1. What is the cause of this leak voltage at the Case.1?

Ans. The leakage is from the the power-mux of internal USB LDO when switching the power source.

And the leakage will turns off when

Q2. Is there possibility of the destruction or malfunction of SoC by the leak voltage?

Ans. The leakage is located in power mux side , it will not affect to SoC.

Is it necessary to rise USB_OTG_VBUS and USB_H1_VBUS at the same time?

No need,

In case the USB Host port is enabled, the USB_H1_VBUS should be directly connected to a 5 V supply.

Best regards

Aven

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

keitanagashima — Thu, 18 Jun 2015 11:06:10 GMT

Hi Aven,

Please answer to my additional questions.

[Q1-1]

> Q1. What is the cause of this leak voltage at the Case.1?

> Ans. The leakage is from the the power-mux of internal USB LDO when switching the power source.

> And the leakage will turns off when

Last sentence looks blank (... turns off when ~ ??).

What did you answer last?

Best Regards,

Keita

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

karina_valencia — Thu, 18 Jun 2015 13:39:25 GMT

AvenTsao please continue with the follow up.

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

karina_valencia — Tue, 23 Jun 2015 14:45:47 GMT

AvenTsao do you have an update?

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

aven_tsao — Wed, 24 Jun 2015 01:54:24 GMT

HI Keita:

Sorry for my mistake.

The leakage is from the the power-mux of internal USB LDO when switching the power source.

And the leakage will turns off when the either input power source is valid.

Best regards

Aven

Re: About leak voltage by USB VBUS timing in i.MX6DQ.

keitanagashima — Wed, 24 Jun 2015 02:03:26 GMT

Hi Aven, Karina

Thank you for your support.

>Sorry for my mistake.

No. problem.

Thank you very much!

Best Regards,

Keita