<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: i.MX6 ONOFF Pull-up? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417979#M62909</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Details of internal schematic implementation of i.MX6 pins are not provided.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;(Some general scheme may be found at Figure 6 (Simplified internal structure &lt;BR /&gt;of the IOMUX for each pin) of app note AN5078 “Influence of Pin Setting on &lt;BR /&gt;System Function and Performance”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf" rel="nofollow"&gt;http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;BR /&gt; And when the i.MX6 environment is out of specified ranges (VSNVS &amp;lt; 2.8V)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;its behavior is not guaranteed. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Yuri.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 05 Aug 2015 08:39:56 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2015-08-05T08:39:56Z</dc:date>
    <item>
      <title>i.MX6 ONOFF Pull-up?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417976#M62906</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt; font-family: 'Verdana','sans-serif'; color: black;"&gt;I have a question concerning the ONOFF pin using the iMX6 device. According to the data sheet, there should be an internal pull-up on this pin to VSNVS.&amp;nbsp; However, we’re seeing that even when VSNVS is present the ONOFF pin is not being pulled up.&amp;nbsp; Do you know if there really is an internal pull-up or if an external one needs to be applied?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jul 2015 18:23:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417976#M62906</guid>
      <dc:creator>adamgarrison</dc:creator>
      <dc:date>2015-07-16T18:23:17Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 ONOFF Pull-up?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417977#M62907</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; According to section 10.5 [ONOFF (Button)] of the i.MX6 DQ RM, the ONOFF signal,&lt;/P&gt;&lt;P&gt;asserted greater than 5 seconds, initiates a hardware-enforced power down request&lt;/P&gt;&lt;P&gt;to the power IC, assuming ONOFF is i.MX6 RESET_IN_B and the power IC is connected&lt;/P&gt;&lt;P&gt;the i.MX6 output PMIC_ON_REQ. The i.MX6 must have TEST_MODE LOW (free).&lt;/P&gt;&lt;P&gt;&amp;nbsp; ONOFF (RESET_IN) signal has internal (100 KOhm ) pull-up, so can be left floating.&lt;/P&gt;&lt;P&gt;But under noisy environment – if internal 100 KOHm pull up is not strong enough – an external&lt;/P&gt;&lt;P&gt;resistor (of 10 KOhm) may be applied.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 Jul 2015 05:48:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417977#M62907</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-07-17T05:48:08Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 ONOFF Pull-up?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417978#M62908</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Candara','sans-serif'; color: #44546a;"&gt;I’ve included some feedback from the customer that we’ve observed.&amp;nbsp; Note that VSYS is the main input voltage to the PMIC and VBACKUP is the battery backup input to the PMIC:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; font-family: 'Helvetica','sans-serif'; color: black;"&gt;In the first trace, when PMIC VBACKUP = 3.3V is applied, causing VSNVS to go to 1.0V, ONOFF does not pull up to 1.0V. It is only later (second trace) when 3.9V is applied to VSYS (PMIC VIN), resulting in VSNVS rising to 3.0V, that the PMIC beings the power on sequencing and ONOFF pulls up to VSNVS = 3.0V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="ONOFF Question for Freescale.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/54623iF709015CE69359E3/image-size/large?v=v2&amp;amp;px=999" role="button" title="ONOFF Question for Freescale.png" alt="ONOFF Question for Freescale.png" /&gt;&lt;/span&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Jul 2015 13:00:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417978#M62908</guid>
      <dc:creator>adamgarrison</dc:creator>
      <dc:date>2015-07-21T13:00:54Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 ONOFF Pull-up?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417979#M62909</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Details of internal schematic implementation of i.MX6 pins are not provided.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;(Some general scheme may be found at Figure 6 (Simplified internal structure &lt;BR /&gt;of the IOMUX for each pin) of app note AN5078 “Influence of Pin Setting on &lt;BR /&gt;System Function and Performance”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf" rel="nofollow"&gt;http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;BR /&gt; And when the i.MX6 environment is out of specified ranges (VSNVS &amp;lt; 2.8V)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;its behavior is not guaranteed. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Yuri.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Aug 2015 08:39:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-ONOFF-Pull-up/m-p/417979#M62909</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-08-05T08:39:56Z</dc:date>
    </item>
  </channel>
</rss>

