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    <title>topic Changes in UART2 pad setting for u-boot in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Changes-in-UART2-pad-setting-for-u-boot/m-p/416243#M62524</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;We are planning to switch from LTIB Platform to Yocto to build images for our custom board based on sabrelite,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;using u-boot-boundary.&lt;BR /&gt;&lt;BR /&gt;Uart debug console in our board is UART2,same as that in sabrelite.&lt;BR /&gt;However, Uart signals are mapped to PAD_GPIO7 and PAD_GPIO8 instead of default EIM_D26 &amp;amp; EIM_D27.&lt;BR /&gt;&lt;BR /&gt;Now, we have done this precisely in LTIB and know the exact working procedure according to LTIB documentation.&lt;BR /&gt;&lt;BR /&gt;But in Yocto we are not able to see debug console output,regarding this i have a doubt.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;We build core-image-base and tried u-boot-boundary and did setting like this in &lt;BR /&gt;mx6qabrelite.c&lt;BR /&gt;iomux_v3_cfg_t const uart2_pads[] = {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6_PAD_GPIO_7__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6_PAD_GPIO_8__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;};&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Do we have to do any other setting for uboot so that we get output on debug uart 2?&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 09 May 2015 05:09:43 GMT</pubDate>
    <dc:creator>piyushashtikar</dc:creator>
    <dc:date>2015-05-09T05:09:43Z</dc:date>
    <item>
      <title>Changes in UART2 pad setting for u-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Changes-in-UART2-pad-setting-for-u-boot/m-p/416243#M62524</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;We are planning to switch from LTIB Platform to Yocto to build images for our custom board based on sabrelite,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial,Helvetica,sans-serif; font-size: 10pt;"&gt;using u-boot-boundary.&lt;BR /&gt;&lt;BR /&gt;Uart debug console in our board is UART2,same as that in sabrelite.&lt;BR /&gt;However, Uart signals are mapped to PAD_GPIO7 and PAD_GPIO8 instead of default EIM_D26 &amp;amp; EIM_D27.&lt;BR /&gt;&lt;BR /&gt;Now, we have done this precisely in LTIB and know the exact working procedure according to LTIB documentation.&lt;BR /&gt;&lt;BR /&gt;But in Yocto we are not able to see debug console output,regarding this i have a doubt.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;We build core-image-base and tried u-boot-boundary and did setting like this in &lt;BR /&gt;mx6qabrelite.c&lt;BR /&gt;iomux_v3_cfg_t const uart2_pads[] = {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6_PAD_GPIO_7__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6_PAD_GPIO_8__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),&lt;BR /&gt;};&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Do we have to do any other setting for uboot so that we get output on debug uart 2?&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 09 May 2015 05:09:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Changes-in-UART2-pad-setting-for-u-boot/m-p/416243#M62524</guid>
      <dc:creator>piyushashtikar</dc:creator>
      <dc:date>2015-05-09T05:09:43Z</dc:date>
    </item>
    <item>
      <title>Re: Changes in UART2 pad setting for u-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Changes-in-UART2-pad-setting-for-u-boot/m-p/416244#M62525</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; According to description of Pad Mux Register IOMUXC_SW_MUX_CTL_PAD_GPIO08&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;to configure it as UART2_RX_DATA (ALT4 mode) it is required additionally&lt;BR /&gt;to configure register IOMUXC_UART2_UART_RX_DATA_SELECT_INPUT for mode ALT4. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 May 2015 08:00:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Changes-in-UART2-pad-setting-for-u-boot/m-p/416244#M62525</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-05-12T08:00:10Z</dc:date>
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