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    <title>topic Re: About Read DQS Calibration. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/About-Read-DQS-Calibration/m-p/414853#M62233</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm not sure about the values obtained from the DDR Stress Tester but your consideration is correct. This value of DG_HC_DEL0=3 represents Gate delay of 1.5 clocks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 19 Nov 2015 11:47:39 GMT</pubDate>
    <dc:creator>LPP</dc:creator>
    <dc:date>2015-11-19T11:47:39Z</dc:date>
    <item>
      <title>About Read DQS Calibration.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-Read-DQS-Calibration/m-p/414852#M62232</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;I have a question about Read DQS Calibration.&lt;/P&gt;&lt;P&gt;Refer to attached file.&lt;/P&gt;&lt;P&gt;Could you check my understanding?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Keita&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Nov 2015 10:46:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-Read-DQS-Calibration/m-p/414852#M62232</guid>
      <dc:creator>keitanagashima</dc:creator>
      <dc:date>2015-11-16T10:46:42Z</dc:date>
    </item>
    <item>
      <title>Re: About Read DQS Calibration.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-Read-DQS-Calibration/m-p/414853#M62233</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm not sure about the values obtained from the DDR Stress Tester but your consideration is correct. This value of DG_HC_DEL0=3 represents Gate delay of 1.5 clocks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Nov 2015 11:47:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-Read-DQS-Calibration/m-p/414853#M62233</guid>
      <dc:creator>LPP</dc:creator>
      <dc:date>2015-11-19T11:47:39Z</dc:date>
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