topic Re: Question, i.MX25 NAND in i.MX Processors

Question, i.MX25 NAND

Aemj — Mon, 16 Nov 2015 08:16:33 GMT

Hi Team,

I would like to ask about NAND Flash which can be used for i.MX257.

My customer is thinking about the use of Toshiba/BENAND, TC58BVG0S3HTAI0, for their custom i.MX25 board.

Could you show me whether the NAND chip can be used for i.MX25?

Please find the attached file for datasheet. It has 2048 Page size + 64 Spare size.

If it can be used for i.MX25,

The NAND flash has Built-in ECC feature. Then, the customer thinks the ECC feature in i.MX25 side will not be needed.

Is it possible to disable ECC feature in i.MX25 side?

Please show me the way to disable ECC feature on i.MX25.

In addition, the BENAND has a restriction on writing data as the attached file.

I think NFC or MFGTOOLS has to support the programming sequence of the BENAND.

If any concerns, please let me know.

Thanks,

Miyamoto

Re: Question, i.MX25 NAND

Yuri — Tue, 17 Nov 2015 07:01:34 GMT

Hello,

I am afraid it is impossible to disable i.MX25 NFC ECC.
Some NAND parts have option to disable internal ECC via SET FEATURE command,

bit internal i.MX25 boot ROM does not perform it. As result flashes with internal ECC

cannot be used for boot under i.MX25.

Have a great day,
Yuri

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Re: Question, i.MX25 NAND

Aemj — Fri, 20 Nov 2015 06:50:09 GMT

Hi Yuri,

Thanks for your comment.

The customer believes it is not a problem that i.MX25 cannot disable ECC.

They believe that if the specification around the page size and spare size of BENAND meet i.MX25 specification then the BENAND can be used.

But their concern is the restriction on programming of the BENAND.

The BENAND has a restriction on its programming as I mentioned in the attached file in original posting.

Could you give your comment on that?

Thanks,

Miyamoto

Re: Question, i.MX25 NAND

Yuri — Tue, 24 Nov 2015 06:15:35 GMT

Hi,

At least one of ECC support must be disabled : of i.MX25 or BENAND, since

ECC algorithm and data / spare layout should be just the same for both

i.MX25 NFC and BENAND to avoid issues. I have some doubt if i.MX25 NFC
and BENAND meet each other regarding ECC algorithm and data / spare layout.

If BENAND ECC can be disabled in software - this means we cannot use the nand
during boot, but can - just for storing.

Regards,

Yuri.

Re: Question, i.MX25 NAND

Aemj — Wed, 25 Nov 2015 07:35:00 GMT

Hi Yuri,

Thanks for your reply.

Basically, the customer believes that the ECC feature does not need to be set to 'disable' in i.MX25 side.

They believes the conflict will not occur because the algorithm of ECC on BENAND differs from i.MX25.

And they believe the point is that i.MX25 must support the ‘collective programming’ which is needed for BENAND.

The customer’s understanding is as below.

Are those correct?

I think that there are differences from your opinion.

Could you give your comment on that?

(1)

i.MX25 NFC can support the programming method which is needed for the BENAND.

The BENAND must be programmed en bloc of 512+16Byte at a time, as mentioned in the attached file in the original posting.

(2)

The algorithms of handling ECC differ between the BENAND and i.MX25 NFC.

For the BENAND, ECC is calculated for every 512+16Byte and the ECC is written in the special area in the BENAND.

For i.MX25 NFC, ECC is calculated for every 512byte main area and the ECC is written into 16Byte spare area.

Then, the ECC algorithms of the BENAND and i.MX25 will run separately.

The conflict will not occur between the algorithms of BENAND and i.MX25 NFC.

(3)

They believes that the BENAND can be used for i.MX25 boot.

One can use the following setting for the BENAND.

BMOD[1:0]=00

SLC_NAND/128Byte_spare_for_4kByte/page_size=2kByte

(4)

The customer believes that BENAND can be used for boot device of i.MX25.

BTW, they are using Linux OS, and uboot, kernel and rootfs are written in the NAND.

BR,

Miyamoto

Re: Question, i.MX25 NAND

Yuri — Thu, 03 Dec 2015 07:37:46 GMT

Hi,

Really NAND layout for the BENAND and i.MX25 is not the same.

BENAND : 512 bytes + 512 bytes + 512 bytes +512 bytes + spare bytes
+ spare bytes + …

i.MX25 : 512 bytes main + spare bytes + 512 bytes main + spare bytes +

512 bytes main +spare bytes + ...

2.
The algorithms of handling ECC differ between the BENAND and i.MX25 NFC.

This definitely does not allow to use them simultaneously. Although ECC algorithms

can work separately, but results (sum and location) will not be the same and

any ECC modifications of BENAND will treated as error by the i.MX25 and vise versa.

3.
The i.MX25 can boot the NAND only if ECC is correct, that is – written by the i.MX25

itself, without any modification by the internal NAND controller.

4.
If the NAND is already working – this means, that really ECC algorithm and layout

for the i.MX25 and the NAND are the same.

Regards,

Yuri

Re: Question, i.MX25 NAND

Aemj — Tue, 22 Dec 2015 04:06:32 GMT

Hi Yuri,

Sorry for my late response.

But the customer is still thinking about the use of the BENAND with i.MX25.

The customer found the following description in i.MX25 reference manual.

“The ECC operation can be bypassed using ECC_EN bit in CONFIG1 register.”

The customer thinks i.MX25 NFC can access the BENAND as 512+512+512+512+64 without checking ECC, when the page-size is 2K bytes, by setting the ECC_EN bit.

Is it true?

Thanks so much,

Miyamoto

Re: Question, i.MX25 NAND

Yuri — Tue, 22 Dec 2015 06:59:40 GMT

Hi,

Yes, if ECC_EN bit in CONFIG1 register is cleared, the ECC functionality of the i.MX25

is totally idle. The problem is how to disable it during boot. To get some register

settings during boot via DCD, requires at least to read boot NAND, assuming by default

ECC is enabled. That is, the first pages of NAND must have correct ECC.

Regards,

Yuri.

Re: Question, i.MX25 NAND

Aemj — Thu, 24 Dec 2015 11:40:23 GMT

Hi Yuri,

Thanks for your comment.

The customer expects that;

i.MX25 can access as the following NAND layout by setting (clear) the ECC_EN bit,

>>> BENAND : 512 bytes + 512 bytes + 512 bytes +512 bytes + spare bytes

>>> + spare bytes + …

even though, i.MX25 access NAND as below.

>>> i.MX25 : 512 bytes main + spare bytes + 512 bytes main + spare bytes

>>> + 512 bytes main +spare bytes + ...

I think that the difference on the NAND layout between BENAND and i.MX25 NFCis still the problem whether the ECC_EN setting is 1 or 0.

Am I correct?

Thanks Miyamoto

Re: Question, i.MX25 NAND

Yuri — Wed, 13 Jan 2016 08:31:02 GMT

Hello,

Alas, i.MX25 cannot use the following NAND layout by setting (clear) the ECC_EN bit,

512 bytes + 512 bytes + 512 bytes +512 bytes + spare bytes + spare bytes + …

The i.MX25 NFC is the same for ECC enabled or not.

Regards,

Yuri.