topic Re: iMX6 IPU: SYNC field in WACK + BMA microcode in i.MX Processors

iMX6 IPU: SYNC field in WACK + BMA microcode

ensc — Fri, 25 Sep 2015 14:55:27 GMT

Hi,

iMX6Q Reference Manual lists in table 37-26 "DC template's commands description" the SYNC field sometimes with a length of 4 bits (e.g. for RD, WSTS) and sometimes with 3 bits (WACK + BMA).

In case of WACK, the WAVEFORM and GLUELOGIC fields are shifted one position right too.

Is this a bug in the documentation (e.g. SYNC is always 4 bits and fields in WACK are at the usual position)? Or is this intended?

Re: iMX6 IPU: SYNC field in WACK + BMA microcode

igorpadykov — Mon, 28 Sep 2015 03:28:33 GMT

Hi Enrico

SYNC field for WACK command is 3 bits, the same can be found in IPU description

for older i.MX processors.

Best regards

igor

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Re: iMX6 IPU: SYNC field in WACK + BMA microcode

ensc — Mon, 28 Sep 2015 09:51:38 GMT

SYNC field for WACK command is 3 bits,

Units #8, #9 and #10 cam not be addressed with WACK or BMA than, right?

the same can be found in IPU description for older i.MX processors.

At least in iMX53 Reference Manual, this seems to be caused be a malformed table (e.g. the N_CLOCK_OPERAND field is 1 bit only; the right bits in WACK + BMA are unspecified).

Re: iMX6 IPU: SYNC field in WACK + BMA microcode

igorpadykov — Tue, 29 Sep 2015 01:57:25 GMT

in iMX51 Reference Manual Table 42-426. DC template’s commands description

it is shown more clear.

~igor