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    <title>topic Re: bind a gpio interrupt to cpu2 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407190#M60647</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have done the problem.&lt;/P&gt;&lt;P&gt;e.g.&amp;nbsp; &lt;SPAN style="color: #e23d39;"&gt;gpio1_18&lt;/SPAN&gt; interrput to cpu2&lt;/P&gt;&lt;P&gt;//-------------------------------------------------------&lt;/P&gt;&lt;P&gt;90 GPIO1 INT7 interrupt request.&lt;/P&gt;&lt;P&gt;91 GPIO1 INT6 interrupt request.&lt;/P&gt;&lt;P&gt;92 GPIO1 INT5 interrupt request.&lt;/P&gt;&lt;P&gt;93 GPIO1 INT4 interrupt request.&lt;/P&gt;&lt;P&gt;94 GPIO1 INT3 interrupt request.&lt;/P&gt;&lt;P&gt;95 GPIO1 INT2 interrupt request.&lt;/P&gt;&lt;P&gt;96 GPIO1 INT1 interrupt request.&lt;/P&gt;&lt;P&gt;97 GPIO1 INT0 interrupt request.&lt;/P&gt;&lt;P&gt;98 GPIO1 Combined interrupt indication for GPIO1 signals 0 - 15.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #e23d39;"&gt;99 GPIO1 Combined interrupt indication for GPIO1 signals 16 - 31.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;100 GPIO2 Combined interrupt indication for GPIO2 signals 0 - 15.&lt;/P&gt;&lt;P&gt;101 GPIO2 Combined interrupt indication for GPIO2 signals 16 - 31.&lt;/P&gt;&lt;P&gt;102 GPIO3 Combined interrupt indication for GPIO3 signals 0 - 15.&lt;/P&gt;&lt;P&gt;103 GPIO3 Combined interrupt indication for GPIO3 signals 16 - 31.&lt;/P&gt;&lt;P&gt;104 GPIO4 Combined interrupt indication for GPIO4 signals 0 - 15.&lt;/P&gt;&lt;P&gt;105 GPIO4 Combined interrupt indication for GPIO4 signals 16 - 31.&lt;/P&gt;&lt;P&gt;106 GPIO5 Combined interrupt indication for GPIO5 signals 0 - 15.&lt;/P&gt;&lt;P&gt;107 GPIO5 Combined interrupt indication for GPIO5 signals 16 - 31.&lt;/P&gt;&lt;P&gt;108 GPIO6 Combined interrupt indication for GPIO6 signals 0 - 15.&lt;/P&gt;&lt;P&gt;109 GPIO6 Combined interrupt indication for GPIO6 signals 16 - 31.&lt;/P&gt;&lt;P&gt;110 GPIO7 Combined interrupt indication for GPIO7 signals 0 - 15.&lt;/P&gt;&lt;P&gt;111 GPIO7 Combined interrupt indication for GPIO7 signals 16 - 31.&lt;/P&gt;&lt;P&gt;//------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;you should do this:&lt;/P&gt;&lt;P&gt;echo 4 &amp;gt; /proc/irq/&lt;SPAN style="color: #e23d39;"&gt;99&lt;/SPAN&gt;/smp_affinity&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 13 Nov 2015 05:14:24 GMT</pubDate>
    <dc:creator>fangxu</dc:creator>
    <dc:date>2015-11-13T05:14:24Z</dc:date>
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      <title>bind a gpio interrupt to cpu2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407188#M60645</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i use imx6q and system built with yocto.&lt;/P&gt;&lt;P&gt;Now i want to bind a gpio interrput to cpu2.how can i do?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Nov 2015 08:00:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407188#M60645</guid>
      <dc:creator>fangxu</dc:creator>
      <dc:date>2015-11-12T08:00:09Z</dc:date>
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      <title>Re: bind a gpio interrupt to cpu2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407189#M60646</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please use Linux affinity feature.&lt;/P&gt;&lt;P&gt;In particular You may look at &lt;A href="https://community.nxp.com/message/303749"&gt;i.mx6 Linux CPU IRQ affinity&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Nov 2015 08:23:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407189#M60646</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-11-12T08:23:08Z</dc:date>
    </item>
    <item>
      <title>Re: bind a gpio interrupt to cpu2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407190#M60647</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have done the problem.&lt;/P&gt;&lt;P&gt;e.g.&amp;nbsp; &lt;SPAN style="color: #e23d39;"&gt;gpio1_18&lt;/SPAN&gt; interrput to cpu2&lt;/P&gt;&lt;P&gt;//-------------------------------------------------------&lt;/P&gt;&lt;P&gt;90 GPIO1 INT7 interrupt request.&lt;/P&gt;&lt;P&gt;91 GPIO1 INT6 interrupt request.&lt;/P&gt;&lt;P&gt;92 GPIO1 INT5 interrupt request.&lt;/P&gt;&lt;P&gt;93 GPIO1 INT4 interrupt request.&lt;/P&gt;&lt;P&gt;94 GPIO1 INT3 interrupt request.&lt;/P&gt;&lt;P&gt;95 GPIO1 INT2 interrupt request.&lt;/P&gt;&lt;P&gt;96 GPIO1 INT1 interrupt request.&lt;/P&gt;&lt;P&gt;97 GPIO1 INT0 interrupt request.&lt;/P&gt;&lt;P&gt;98 GPIO1 Combined interrupt indication for GPIO1 signals 0 - 15.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #e23d39;"&gt;99 GPIO1 Combined interrupt indication for GPIO1 signals 16 - 31.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;100 GPIO2 Combined interrupt indication for GPIO2 signals 0 - 15.&lt;/P&gt;&lt;P&gt;101 GPIO2 Combined interrupt indication for GPIO2 signals 16 - 31.&lt;/P&gt;&lt;P&gt;102 GPIO3 Combined interrupt indication for GPIO3 signals 0 - 15.&lt;/P&gt;&lt;P&gt;103 GPIO3 Combined interrupt indication for GPIO3 signals 16 - 31.&lt;/P&gt;&lt;P&gt;104 GPIO4 Combined interrupt indication for GPIO4 signals 0 - 15.&lt;/P&gt;&lt;P&gt;105 GPIO4 Combined interrupt indication for GPIO4 signals 16 - 31.&lt;/P&gt;&lt;P&gt;106 GPIO5 Combined interrupt indication for GPIO5 signals 0 - 15.&lt;/P&gt;&lt;P&gt;107 GPIO5 Combined interrupt indication for GPIO5 signals 16 - 31.&lt;/P&gt;&lt;P&gt;108 GPIO6 Combined interrupt indication for GPIO6 signals 0 - 15.&lt;/P&gt;&lt;P&gt;109 GPIO6 Combined interrupt indication for GPIO6 signals 16 - 31.&lt;/P&gt;&lt;P&gt;110 GPIO7 Combined interrupt indication for GPIO7 signals 0 - 15.&lt;/P&gt;&lt;P&gt;111 GPIO7 Combined interrupt indication for GPIO7 signals 16 - 31.&lt;/P&gt;&lt;P&gt;//------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;you should do this:&lt;/P&gt;&lt;P&gt;echo 4 &amp;gt; /proc/irq/&lt;SPAN style="color: #e23d39;"&gt;99&lt;/SPAN&gt;/smp_affinity&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Nov 2015 05:14:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/bind-a-gpio-interrupt-to-cpu2/m-p/407190#M60647</guid>
      <dc:creator>fangxu</dc:creator>
      <dc:date>2015-11-13T05:14:24Z</dc:date>
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