i.MX6 with OpenOCD - Error when performing DDR initialization commands

tordandersson — Tue, 16 Jun 2015 20:07:05 GMT

In order to load and debug U-Boot on a Nitrogen Max 4G board I would like to perform initial setup as done by the IVT header appended to U-Boot. I have extracted the content of the cfg files and created an OpenOCD configuration with ddr initialization. Unfortunately, as soon as commands are sent through the command register I get a timeout.

The same behaviour has been observed with both Flyswatter and JLink interfaces. The initialization works OK when booting from SPI-NOR flash.

I have tried to adjust timing, but have not been able to pass this step. Has anyone experienced similar problems? Any workarounds?

Here is the debug output from OpenOCD:

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Debug: 1067 52560 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww phys 0x021b001c 0x04088032

Debug: 1068 52560 command.c:145 script_debug(): command - mww ocd_mww phys 0x021b001c 0x04088032

Debug: 1070 52563 cortex_a.c:2661 cortex_a_write_phys_memory(): Writing memory to real address 0x21b001c; size 4; count 1

Warn : 1073 53569 adi_v5_jtag.c:239 jtagdp_transaction_endcheck(): Timeout (1000ms) waiting for ACK=OK/FAULT in JTAG-DP transaction - aborting

Debug: 1074 53572 adi_v5_jtag.c:271 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT error, 0xf0000003

Debug: 1075 53572 adi_v5_jtag.c:290 jtagdp_transaction_endcheck(): MEM-AP Cached values: ap_bank 0x0, ap_csw 0xe2000022, ap_tar 0x21b001c

Error: 1076 53572 adi_v5_jtag.c:294 jtagdp_transaction_endcheck(): JTAG-DP OVERRUN - check clock, memaccess, or reduce jtag speed

Debug: 1077 53574 adi_v5_jtag.c:314 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT 0xf0000001

Error: 1078 53577 adi_v5_jtag.c:330 jtagdp_transaction_endcheck(): MEM_AP_CSW 0x428000e2, MEM_AP_TAR 0x21b001c

Error: 1079 53578 arm_adi_v5.c:404 mem_ap_write(): Failed to write memory and, additionally, failed to find out where

Debug: 1080 53578 command.c:628 run_command(): Command failed with error code -107

User : 1081 53578 command.c:689 command_run_line():

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And here is the offending command:

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# Config commands to DDR

mww phys 0x021b001c 0x04088032

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The origin of the OpenOCD config file comes from the Sabre SD config in this article: http://www.edlangley.co.uk/blog/2014/06/rescuing-bricked-secure-mode-i.mx6/

Original Attachment has been moved to: nitrogen_max_flyswatter.cfg.zip

Re: i.MX6 with OpenOCD - Error when performing DDR initialization commands

igorpadykov — Thu, 18 Jun 2015 13:03:01 GMT

HI Tord

it may be recommended to JTAG_MOD=0 and check

jtag chains with described in Chapter 7 Configuring JTAG Tools

IMX6DQ6SDLHDG

for i.MX6 with OCD one can look at

OpenOCD Problem i.MX6

Best regards

igor

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Re: i.MX6 with OpenOCD - Error when performing DDR initialization commands

tordandersson — Mon, 22 Jun 2015 13:42:20 GMT

Solved! The problem is caused by repeated DDR initialization. The first initialization is done by a dormant boot loader in the SPI NOR flash. By forcing USB serial download mode the commands are accepted by the DDR and memory is set up correctly.

i.MX ProcessorsのトピックRe: i.MX6 with OpenOCD - Error when performing DDR initialization commands

i.MX6 with OpenOCD - Error when performing DDR initialization commands

Re: i.MX6 with OpenOCD - Error when performing DDR initialization commands

Re: i.MX6 with OpenOCD - Error when performing DDR initialization commands