<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Issues about DDR porting on MX6DL</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402671#M59634</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，igor&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In my current stage ,I dont use the initramfs.cpio.gz.uboot at all,and just test u-boot.bin. Why do I need to rebuild it? Could you help me to sweep the confusion, Thank you very much.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; And if convenient, could give me the way for rebuilding initramfs.cpio.gz.uboot in detail, Thanks a lot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Jul 2015 01:57:11 GMT</pubDate>
    <dc:creator>tony_l_cai</dc:creator>
    <dc:date>2015-07-14T01:57:11Z</dc:date>
    <item>
      <title>Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402667#M59630</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear all,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; we are porting Android 5.0 on MX6DL, and we found the changes from Android 4.2 to Android 5 in DDR porting.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 In Android 4.2, we use the Flash_header.S for DDR porting. the configuration is enclosed. But in Android 5.0, we port it by cfg file, and maybe it is applied in project yocto?(we havent worked in project yocto before.) &lt;STRONG&gt;So could you give me some info about porting DDR by cfg&lt;/STRONG&gt;?&amp;nbsp; I found the main deference between cfg and flash_header.s is that the addtional configure for setting the default clock gate to save power in cfg file. &lt;STRONG&gt;Please help me to re-check the DDR config settings from flash_header.S to cfg file&lt;/STRONG&gt;. 3Q~&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2. I also found obvious diffences between "bootable\bootloader\uboot-imx\board\freescale\mx6sabresd\mx6sabresd.c" and "bootable\bootloader\uboot-imx\board\freescale\mx6q_sabresd\mx6q_sabresd.c"，So does this changes will impact on the u-boot.bin excute?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; The reason why I asked all these questions is&amp;nbsp; that our uboot porting cannot go when I download the u-boot to the board and jump to OS. But the same way can succeeded in Android 4.2.&amp;nbsp; the question see also&amp;nbsp; &lt;A _jive_internal="true" data-containerid="2004" data-containertype="14" data-objectid="359074" data-objecttype="1" href="https://community.nxp.com/thread/359074?sr=search&amp;amp;searchId=a7876968-3eb5-45ce-b606-d7e3323853e8&amp;amp;searchIndex=1#534587"&gt;https://community.freescale.com/message/534587?sr=search&amp;amp;searchId=a7876968-3eb5-45ce-b606-d7e3323853e8&amp;amp;searchIndex=1#534…&lt;/A&gt; &lt;/P&gt;&lt;P&gt;3Q~&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336238"&gt;flash_header.S.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336238"&gt;EM70_Lollipop_DDR3.cfg.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Jul 2015 03:02:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402667#M59630</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-07-13T03:02:00Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402668#M59631</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for custom board one also needs to rebuild mfg tools firmware, refer to attached&lt;/P&gt;&lt;P&gt;Yocto Guide sect.6.2 The Manufacturing Tool, MFGTool, then replace&lt;/P&gt;&lt;P&gt;files in mfg tools folder /firmware&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=RDIMX6SABREBRD&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab"&gt;L3.10.53_1.1.0_iMX6QDLS_Bundle&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In general for testing one can build minimal linux image and try to flash it&lt;/P&gt;&lt;P&gt;with mgf tools.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Jul 2015 03:57:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402668#M59631</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-07-13T03:57:10Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402669#M59632</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear &lt;STRONG style="font-size: 12.6000003814697px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;A href="https://community.nxp.com/people/igorpadykov"&gt;igorpadykov&lt;/A&gt;​&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-size: 12.6000003814697px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Maybe these problems are irrelevent with the MFG Tool Firmware, Because we just download the uboot.bin and jump to OS, the content of the&amp;nbsp; uc2.xml is as below:( we are now just testing the uboot)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; &amp;lt;LIST name="eMMC-Android-IMX6DL-SabreSD" desc="Choose eMMC as media"&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;lt;CMD state="BootStrap" type="boot" body="BootStrap" file ="firmware/u-boot.bin"&amp;gt;Loading U-boot&amp;lt;/CMD&amp;gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;lt;CMD state="BootStrap" type="jump" &amp;gt; Jumping to OS image. &amp;lt;/CMD&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;lt;/LIST&amp;gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Jul 2015 09:52:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402669#M59632</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-07-13T09:52:00Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402670#M59633</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, I do not think so.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In any way you can test suggestion and check if this helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Jul 2015 12:06:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402670#M59633</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-07-13T12:06:29Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402671#M59634</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi，igor&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In my current stage ,I dont use the initramfs.cpio.gz.uboot at all,and just test u-boot.bin. Why do I need to rebuild it? Could you help me to sweep the confusion, Thank you very much.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; And if convenient, could give me the way for rebuilding initramfs.cpio.gz.uboot in detail, Thanks a lot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jul 2015 01:57:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402671#M59634</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-07-14T01:57:11Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402672#M59635</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;if you are using mfg tools, it uses initramfs.cpio.gz.uboot&lt;/P&gt;&lt;P&gt;Also I would suggest to apply for i.MX6 training&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/training_information.jsp?code=SEM_IMX6" title="http://www.freescale.com/webapp/sps/site/training_information.jsp?code=SEM_IMX6"&gt;i.MX 6 Series Processors Seminar|Freescale&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jul 2015 02:25:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402672#M59635</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-07-14T02:25:08Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402673#M59636</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, igor&lt;/P&gt;&lt;P&gt;we use the same way to test uboot.bin in our custom board (Android 4.2), it can succeed to test u-boot.bin, but Android 5.0 cannot.&lt;/P&gt;&lt;P&gt;UL2.xml content is as below:&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;lt;LIST name="eMMC-Android-IMX6DL-SabreSD" desc="Choose eMMC as media"&amp;gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp; &amp;lt;CMD state="BootStrap" type="boot" body="BootStrap" file ="firmware/u-boot.bin"&amp;gt;Loading U-boot&amp;lt;/CMD&amp;gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp; &amp;lt;CMD state="BootStrap" type="jump" &amp;gt; Jumping to OS image. &amp;lt;/CMD&amp;gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp; &amp;lt;/LIST&amp;gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jul 2015 02:32:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402673#M59636</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-07-14T02:32:24Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about DDR porting on MX6DL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402674#M59637</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;you should rebuild all files in firmware folder firmware/u-boot.bin,&lt;/P&gt;&lt;P&gt;with specific settings for custom board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jul 2015 04:18:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-DDR-porting-on-MX6DL/m-p/402674#M59637</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-07-14T04:18:42Z</dc:date>
    </item>
  </channel>
</rss>

