NAND BOOT imx537

Noel_V — Thu, 05 Jul 2012 15:36:55 GMT

Hi all,

I've been searching some weeks now why an IMX537 often (but not always)... fails to boot from NAND.

I tought it was hardware related BUT, today, I finally ended up into the bootloader ivt-tables and code...

For some reason .. there is some code that seems to fail SOMETIMES (30% if works to boot from nand, 70% it fails)

cmp r7, #0xF8000000
bls return_sdp

When I do remove the above lines from the UBOOT-code .. I'm always able to boot the imx537 form nand.

Anyone out there that can confirm / explain why register (r0 , that is copied to r7) contains bad data when booting from nand (CPU revision 0x21).

Regards Noel

<< CODE - SNIP >>

/* Here starts the plugin code */
plugin_start:
   /* Save the return address and the function arguments */
   push {r0-r6, lr}
   /* We should distinguish USB recovery mode(SDP mode) and internal boot mode.
   If ROM runs in SDP mode, then it needn't load boot code from storage media.
   If ROM runs in SDP mode, then r0 must be 0x00
   If ROM runs in internal boot mode, then r0 should be larger than IRAM base address. */
   mov r7, r0

... some code removed....

   adr r0, DDR_DEST_ADDR
   adr r1, COPY_SIZE
   adr r2, BOOT_DATA
before_calling_rom___pu_irom_hwcnfg_setup:

   /* We should distinguish USB recovery mode(SDP mode) and internal boot mode.
   If ROM runs in SDP mode, then it needn't load boot code from storage media.
   If ROM runs in SDP mode, then r0 must be 0x00
   If ROM runs in internal boot mode, then r0 should be larger than IRAM base address. */

   cmp r7, #0xF8000000
   bls return_sdp

Re: NAND BOOT imx537

VladanJovanovic — Thu, 09 Aug 2012 06:43:12 GMT

Hi,

do you configure boot mode using GPIO pins or via fuses? If it's via GPIOs, it may be some of them are floating or are driven externally to wrong value at boot time, which causes confusion to boot code.

br,

Vladan

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