topic Re: MIPI-CSI2 data flow in i.MX6DQ. in i.MX Processors

MIPI-CSI2 data flow in i.MX6DQ.

keitanagashima — Fri, 31 Jul 2015 01:23:00 GMT

Dear All,

Hello.

Now, we are debugging about video data input via MIPI-CSI2.

But, i.MX6 doesn't input the data correctly.

[Question]

The MIPI data flows among CSI-FIFO-IDMAC.

Is there a way of confirming to the block where MIPI data exists?

Best Regards,

Keita

Re: MIPI-CSI2 data flow in i.MX6DQ.

art — Fri, 31 Jul 2015 11:21:38 GMT

There are three basic blocks, involved in the MIPI CSI data flow: the MIPI CSI interface itself, MIPI_CSI-to-IPU gasket that interconnects MIPI CSI interface module and IPU CSI ports, and the IPU module itself. All of these blocks should be properly configured for correct operation. For details, please refer to the corresponding chapters in the Reference Manual document for the i.MX6 family processor you use.

Have a great day,
Artur

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Re: MIPI-CSI2 data flow in i.MX6DQ.

keitanagashima — Mon, 03 Aug 2015 05:18:32 GMT

Dear Artur,

Thank you for your reply.

> All of these blocks should be properly configured for correct operation

I think so, too.

But, my customer didn't find the wrong setting.

So, we would like the where MIPI data exists (MIPI-CSI2? gasket? IPU-CSI? FIFO? IDMAC?)

Is there a way of confirming to the block where MIPI data exists?

Best Regards,

Keita

Re: MIPI-CSI2 data flow in i.MX6DQ.

art — Thu, 27 Aug 2015 09:44:30 GMT

First, check whether data is coming to the IPU-CSI FIFO.

Best Regards,

Artur

Re: MIPI-CSI2 data flow in i.MX6DQ.

keitanagashima — Wed, 02 Sep 2015 11:24:22 GMT

Dear Artur,

Thank you for your reply.

Does i.MX6 have the register to check the IPU-CSI FIFO?

(ex, IPUx_DIx_STAT?,IPUx_DC_STAT?)

Best Regards,

Keita

Re: MIPI-CSI2 data flow in i.MX6DQ.

keitanagashima — Tue, 15 Sep 2015 12:52:02 GMT

Dear Artur,

Please informe me about how to check the IPU-CSI FIFO.

Best Regards,

Keita