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    <title>topic Re: Issues about Linking DDR cfg in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-Linking-DDR-cfg/m-p/397219#M58302</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for boards.cfg dependencies one can look at denx documentation&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://www.denx.de/wiki/pub/U-Boot/MiniSummitELCE2014/uboot2014_kconfig.pdf" rel="nofollow"&gt;http://www.denx.de/wiki/pub/U-Boot/MiniSummitELCE2014/uboot2014_kconfig.pdf&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp; p.12 or&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;attached Porting Guide p.9&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 26 Aug 2015 03:54:39 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-08-26T03:54:39Z</dc:date>
    <item>
      <title>Issues about Linking DDR cfg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-Linking-DDR-cfg/m-p/397218#M58301</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,all&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In U-boot 2009,we can easily link Flash_header.o (the DDR param file Flash_header.S) in u-boot.lds,as the following:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/52890i2E445230760BF40D/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt; &lt;/P&gt;&lt;P&gt;But now,in Android 5.0,we use Uboot 2014 on MX6DL, we find it use the DDR.cfg(bootable\bootloader\uboot-imx\board\freescale\mx6sabresd). I don't know how link this file. and I know this file has been defined in boards.cfg. However, I want to know all these files'&amp;nbsp; interrelationships. So could you give me more help? Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 02:15:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-Linking-DDR-cfg/m-p/397218#M58301</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-08-26T02:15:43Z</dc:date>
    </item>
    <item>
      <title>Re: Issues about Linking DDR cfg</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-about-Linking-DDR-cfg/m-p/397219#M58302</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for boards.cfg dependencies one can look at denx documentation&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://www.denx.de/wiki/pub/U-Boot/MiniSummitELCE2014/uboot2014_kconfig.pdf" rel="nofollow"&gt;http://www.denx.de/wiki/pub/U-Boot/MiniSummitELCE2014/uboot2014_kconfig.pdf&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp; p.12 or&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;attached Porting Guide p.9&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 03:54:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-about-Linking-DDR-cfg/m-p/397219#M58302</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-08-26T03:54:39Z</dc:date>
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