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    <title>i.MX ProcessorsのトピックRe: Using LVDS Pins as GPIOs possible?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172265#M5807</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;here are some cluse:&lt;/P&gt;&lt;P&gt;1. please check if any other pin was configured as GPIO6_30, that may cause confliction&lt;/P&gt;&lt;P&gt;2. check if the power domain was okay for GPIO6 group.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 23 Aug 2012 02:05:52 GMT</pubDate>
    <dc:creator>Yanfei_Sun</dc:creator>
    <dc:date>2012-08-23T02:05:52Z</dc:date>
    <item>
      <title>Using LVDS Pins as GPIOs possible?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172264#M5806</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there a way to use the LVDS Pins as GPIOs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to use the LVDS1_TX0_P as GPIO6_30. Therefore I configured the IOMUX with MX53_PAD_LVDS1_TX0_P__GPIO6_30 --&amp;gt; should select "ALT0 mux port: GPI[30] of instance: gpio6." according to the schematic.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Requesting the GPIO works fine, but if I set the output to '1' nothing happens on the pin, and still read '0'.&lt;/P&gt;&lt;P&gt;The control of the GPIO is done as follows.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define SX8656_nRST&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IMX_GPIO_NR(6, 30)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ret = gpio_request(SX8656_nRST, "SX8656");&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (ret)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_info("B\n");&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;return ret;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if(gpio_direction_output(SX8656_nRST, 1))&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The code above should be definitely correct. If I use GPIO4_18 instead, everthing works fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could this problem caused by "NON_PAD_I" in the definition of the IOMUX in iomux-mx53.h?&lt;/P&gt;&lt;P&gt;#define _MX53_PAD_LVDS1_TX0_P__GPIO6_30&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;IOMUX_PAD(NON_PAD_I, 0x1FC, 0, 0x0, 0, 0)&lt;/P&gt;&lt;P&gt;#define _MX53_PAD_DI0_PIN2__GPIO4_18&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;IOMUX_PAD(0x380, 0x54, 1, 0x0, 0, 0)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Rooney&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jul 2012 08:58:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172264#M5806</guid>
      <dc:creator>Rooney</dc:creator>
      <dc:date>2012-07-05T08:58:20Z</dc:date>
    </item>
    <item>
      <title>Re: Using LVDS Pins as GPIOs possible?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172265#M5807</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;here are some cluse:&lt;/P&gt;&lt;P&gt;1. please check if any other pin was configured as GPIO6_30, that may cause confliction&lt;/P&gt;&lt;P&gt;2. check if the power domain was okay for GPIO6 group.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Aug 2012 02:05:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172265#M5807</guid>
      <dc:creator>Yanfei_Sun</dc:creator>
      <dc:date>2012-08-23T02:05:52Z</dc:date>
    </item>
    <item>
      <title>Re: Using LVDS Pins as GPIOs possible?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172266#M5808</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I found the answer of my question in the small print of the datasheet... The LVDS pins can alternatively only be used as inputs (GPI)!!!!!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Oct 2012 06:43:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-LVDS-Pins-as-GPIOs-possible/m-p/172266#M5808</guid>
      <dc:creator>Rooney</dc:creator>
      <dc:date>2012-10-23T06:43:32Z</dc:date>
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