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    <title>i.MX ProcessorsのトピックRe: flash boot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395685#M57971</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI saida&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can check pinmux boot settings, please refer to&lt;/P&gt;&lt;P&gt;Table 8-10. EIM IOMUX Pin Configuration i.MX6SDL Reference Manual (rev.2&amp;nbsp; 5/2015),&lt;/P&gt;&lt;P&gt;check nor lines with oscilloscope.&lt;/P&gt;&lt;P&gt;Also, had you tried u-boot.imx to boot from other device, for example SD ?&lt;/P&gt;&lt;P&gt;Reason is that for custom board u-boot.imx should be rebuilt, changes should be&lt;/P&gt;&lt;P&gt;done in mx6dl_4x_mt41j128.cfg (ddr settings found from ddr test) and&lt;/P&gt;&lt;P&gt;uboot../configs/mx6qsabreauto.h - tweak ddr size, also pay attention to:&lt;/P&gt;&lt;P&gt;/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 26 Aug 2015 02:01:24 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-08-26T02:01:24Z</dc:date>
    <item>
      <title>flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395684#M57970</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi community&lt;/P&gt;&lt;P&gt; in my custom board i have spansion flash (29gl064h).&lt;/P&gt;&lt;P&gt;my idea is load u-boot.imx in flash and boot from flash, for this i am doing following steps&lt;/P&gt;&lt;P&gt;1. from u-boot i erased flash&lt;/P&gt;&lt;P&gt;2.u-boot.imx is loaded in to 0x12000000 address in ddr&lt;/P&gt;&lt;P&gt;3.cp.w 0x12000000 0x08001000 0x30600 (my u-boot.imx size is 0x60c00 bytes and i&amp;nbsp; converted to words which is 0x60c00/2=0x30600)&lt;/P&gt;&lt;P&gt;than i am booting from standalone after resetting the processor&lt;/P&gt;&lt;P&gt;but it's not booting i mean prompt is not coming on hyper terminal&lt;/P&gt;&lt;P&gt;the same u-boot code is running from ARM-DS5 debugger (where i downloaded u-boot code into flash)&lt;/P&gt;&lt;P&gt;from reference manual i found that IVT offset is 0x1000&amp;nbsp; and my nor flash is on CS0 at 0x08000000 address.&lt;/P&gt;&lt;P&gt;after loading u-boot.imx into flash my Debugger JTAG is Not connecting (it is giving unable to stop running target error)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what could be the problem ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;plz give yous suggestions in this regard&lt;/P&gt;&lt;P&gt;thanks in advance&lt;/P&gt;&lt;P&gt;Saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Aug 2015 12:04:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395684#M57970</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-08-25T12:04:42Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395685#M57971</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI saida&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can check pinmux boot settings, please refer to&lt;/P&gt;&lt;P&gt;Table 8-10. EIM IOMUX Pin Configuration i.MX6SDL Reference Manual (rev.2&amp;nbsp; 5/2015),&lt;/P&gt;&lt;P&gt;check nor lines with oscilloscope.&lt;/P&gt;&lt;P&gt;Also, had you tried u-boot.imx to boot from other device, for example SD ?&lt;/P&gt;&lt;P&gt;Reason is that for custom board u-boot.imx should be rebuilt, changes should be&lt;/P&gt;&lt;P&gt;done in mx6dl_4x_mt41j128.cfg (ddr settings found from ddr test) and&lt;/P&gt;&lt;P&gt;uboot../configs/mx6qsabreauto.h - tweak ddr size, also pay attention to:&lt;/P&gt;&lt;P&gt;/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 02:01:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395685#M57971</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-08-26T02:01:24Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395686#M57972</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI igorpadykov&lt;/P&gt;&lt;P&gt;i can assume from your reply that the procedure what i am doing is correct to load into norflash.&lt;/P&gt;&lt;P&gt;1. From Table 8-9 (8.5.1) page no 398, i configured internal boot mode, nor flash on EIM bus and norflash is notmuxed on lower half data bus.&lt;/P&gt;&lt;P&gt;2. i have Sabresd Dual Lite development board and u-boot is&amp;nbsp; rebuild (u-boot-2015-01) and using dd command i loaded into SD card from that u-boot is running on Sabresd board but my custom board don't have sdcard.&lt;/P&gt;&lt;P&gt;3. From ARM-DS5 also i loaded u-boot(used for to load symbols) and u-boot.bin files into DDR and u-boot is working. here i used DDR Script file through debugger which is from SDK source code tools directory.&lt;/P&gt;&lt;P&gt;4.EIM pads for lower half i checked in debugger memory view from IOMUX registers 0x020e0054 to 8c and 0x020e0098.&lt;/P&gt;&lt;P&gt;5.i am building u-boot for mx6sabresd.h board only because the DDR which i have is same with Sabresd board.&lt;/P&gt;&lt;P&gt;6. i am expecting that whether DDR is initialized or not ?&lt;/P&gt;&lt;P&gt;7. where this DCD script is in u-boot.&lt;/P&gt;&lt;P&gt;8. why my debugger is not connecting to target after nor flash written and trying to boot from it ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regrds&lt;/P&gt;&lt;P&gt;Saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 07:10:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395686#M57972</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-08-26T07:10:27Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395687#M57973</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi saida&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;though, as you said "board only because the DDR which i have is same with Sabresd board",&lt;/P&gt;&lt;P&gt;it does not guarantee that ddr settings for Sabresd board will work good on your board.&lt;/P&gt;&lt;P&gt;Please run DDR test:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="32294" data-containertype="2020" data-objectid="96412" data-objecttype="102" href="https://community.freescale.com/docs/DOC-96412"&gt;https://community.freescale.com/docs/DOC-96412&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;new ddr settings found from ddr test should be entered to mx6dl_4x_mt41j128.cfg&lt;/P&gt;&lt;P&gt;and uboot should be rebuilt.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;why my debugger is not connecting to target after nor flash written and trying to boot from it&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;because processor entered unrecoverable state after executing wrong command.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 07:38:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395687#M57973</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-08-26T07:38:03Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395688#M57974</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igorpadykov&lt;/P&gt;&lt;P&gt;thanks for your quick reply&lt;/P&gt;&lt;P&gt;1. from your last post i will try to modify mx6q_4x_mf41j128.cfg and mxdlsabresd.cfg file with "nor" instead of "sd" than i will come to back.&lt;/P&gt;&lt;P&gt;2. can i do like this, taking copy of&amp;nbsp; data from this script "MX6DL_SabreSD_DDR3_v1.6" from SDK/tools directory which is working with my custom board with ARM-DS5 debugger and modify mx6q_4x_mf41j128.cfg and mx6dlsabresd.cfg files with above data than build u-boot and flash it.?&lt;/P&gt;&lt;P&gt;3. after doing this where should i write data into flash whether it is at location 0x08000000 or 0x08001000 which is IVT offset.?&lt;/P&gt;&lt;P&gt;4. from reference manual i found that flash can be boot at 32bit bus but from 8.5.1 it is not there, how can i boot from 32 bit bus ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this is my last step to up my board if it boots from flash my custom board is up (hopefully) and i really thanks to i.mx6 community people for their help and specifically you (igorpadykov) for consistent and quick response.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 11:52:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395688#M57974</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-08-26T11:52:45Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395689#M57975</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi saida&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;only boot options is 16 bits as describes 8.5.1.&lt;/P&gt;&lt;P&gt;One can also try with sdk script, I would highly recommend to check&lt;/P&gt;&lt;P&gt;with oscilloscope data on nor flash pins. At least you should see and check&lt;/P&gt;&lt;P&gt;ivt header data. ivt header should be placed on 0x08001000.&lt;/P&gt;&lt;P&gt;Btw had you implemented "Bus isolation circuit" as described in&lt;/P&gt;&lt;P&gt;sect2.3 Bus isolation circuit i.MX6 System Development User’s Guide (rev.1, 6/2013)&amp;nbsp; ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf" rel="nofollow"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After nor boot fails, processor should go to Serial Downloader, one can detect&lt;/P&gt;&lt;P&gt;it connecting usb cable and running mfg tools.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For connection with jtag one can set BOOT_CFG4[7]=1 (enter infinite loop) then try to&lt;/P&gt;&lt;P&gt;connect with jtag. Then check registers SRC_SBMR1,2 they should have&lt;/P&gt;&lt;P&gt;correct boot settings for parallel nor. One can debug it further using post&lt;/P&gt;&lt;P&gt;below (Tim Harvey 30.05.2013 18:26)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-message-small" data-containerid="2004" data-containertype="14" data-objectid="332928" data-objecttype="2" href="https://community.freescale.com/message/332928#332928"&gt;https://community.freescale.com/message/332928#332928&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Aug 2015 12:13:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395689#M57975</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-08-26T12:13:10Z</dc:date>
    </item>
    <item>
      <title>Re: flash boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395690#M57976</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi igorpadykov&lt;/P&gt;&lt;P&gt;Finally it's booting from NOR Flash thank you for your support.&lt;/P&gt;&lt;P&gt;1. i made changes to ddr and mx6sabresd configuration files with respect to my ddr script file than it is working.&lt;/P&gt;&lt;P&gt;2. i changed sd to nor in cfg files.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks and regards&lt;/P&gt;&lt;P&gt;saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Aug 2015 05:05:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/flash-boot/m-p/395690#M57976</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-08-28T05:05:23Z</dc:date>
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