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    <title>i.MX ProcessorsのトピックDualLite SATA_VP and SATA_VPH</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395656#M57964</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Section 4.1 of AN4397, last paragraph:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"The fourth difference is about SATA_VP (G13) and SATA_VPH (G12). In i.MX 6Quad and i.MX 6Dual, SATA_VP and SATA_VPH are recommended to be grounded, if not in use. In i.MX 6DualLite and i.MX 6Solo, no SATA function is available and all these pins are recommended to be NC."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If G12 and G13 are NC on the DualLite, can they be powered, i.e. no need for a selection resistor when using the DualLite vs. Quad?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 09 Nov 2015 02:06:29 GMT</pubDate>
    <dc:creator>inderjitbains</dc:creator>
    <dc:date>2015-11-09T02:06:29Z</dc:date>
    <item>
      <title>DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395656#M57964</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Section 4.1 of AN4397, last paragraph:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"The fourth difference is about SATA_VP (G13) and SATA_VPH (G12). In i.MX 6Quad and i.MX 6Dual, SATA_VP and SATA_VPH are recommended to be grounded, if not in use. In i.MX 6DualLite and i.MX 6Solo, no SATA function is available and all these pins are recommended to be NC."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If G12 and G13 are NC on the DualLite, can they be powered, i.e. no need for a selection resistor when using the DualLite vs. Quad?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Nov 2015 02:06:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395656#M57964</guid>
      <dc:creator>inderjitbains</dc:creator>
      <dc:date>2015-11-09T02:06:29Z</dc:date>
    </item>
    <item>
      <title>Re: DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395657#M57965</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Please follow recommendation of Table 2-14 (Miscellaneous recommendations)&lt;BR /&gt; of the “Hardware Development Guide for i.MX 6 …”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;“NC contacts are no connect and should be floated. […] Depending on the feature set, &lt;BR /&gt; some versions of the IC may have NC contacts connected inside the BGA.”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf" rel="nofollow"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Nov 2015 03:31:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395657#M57965</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-11-09T03:31:31Z</dc:date>
    </item>
    <item>
      <title>Re: DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395658#M57966</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is it possible to check if these particular pins (G12 and G13) have connections for the DualLite? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For VDD_CACHE_CAP (N12), section 4.1 of AN4397:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"The third difference is about VDD_CACHE_CAP (N12). In i.MX 6Quad and i.MX 6Dual, VDD_CACHE_CAP should be connected to VDDSOC_CAP, whereas in i.MX 6DualLite and i.MX 6Solo, pin N12 can be NC."&amp;nbsp; The DualLite schematic (MCIMX6DL-SDP) has N12 connected directly to VDD_SOC.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Nov 2015 08:42:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395658#M57966</guid>
      <dc:creator>inderjitbains</dc:creator>
      <dc:date>2015-11-09T08:42:05Z</dc:date>
    </item>
    <item>
      <title>Re: DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395659#M57967</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You may look at &lt;A href="https://www.freescale.com/webapp/Download?colCode=i.MX6_SABRE_AI_DESIGNFILES&amp;amp;appType=license&amp;amp;location=null&amp;amp;fpsp=1&amp;amp;WT_TYPE=Schematics&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=zip&amp;amp;WT_ASSET=Downloads&amp;amp;fileExt=.zip&amp;amp;Parent_nodeId=1337804786486708148933&amp;amp;Parent_pageType=product" title="https://www.freescale.com/webapp/Download?colCode=i.MX6_SABRE_AI_DESIGNFILES&amp;amp;appType=license&amp;amp;location=null&amp;amp;fpsp=1&amp;amp;WT_TYPE=Schematics&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=zip&amp;amp;WT_ASSET=Downloads&amp;amp;fileExt=.zip&amp;amp;Parent_nodeId=1337804786486708148933&amp;amp;Parent_pageType=product"&gt;https://www.freescale.com/webapp/Download?colCode=i.MX6_SABRE_AI_DESIGNFILES&amp;amp;appType=license&amp;amp;location=null&amp;amp;fpsp=1&amp;amp;WT_TYP…&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Nov 2015 09:40:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395659#M57967</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-11-09T09:40:48Z</dc:date>
    </item>
    <item>
      <title>Re: DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395660#M57968</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The DualLite schematic show R626 and R639 as 0-ohm series resistors for G12 and G13 respectively.&amp;nbsp; The BOM does not list these resistors and DNP.&amp;nbsp; Are these resistors populated on the board?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So is it okay to power these pins on the DualLite?&amp;nbsp; Can you check with the development team if these pins are internally connected, or ever will be internally connected on future revisions on the DualLite?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Nov 2015 01:03:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395660#M57968</guid>
      <dc:creator>inderjitbains</dc:creator>
      <dc:date>2015-11-11T01:03:44Z</dc:date>
    </item>
    <item>
      <title>Re: DualLite SATA_VP and SATA_VPH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395661#M57969</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Basically &lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt; it is possible to power these pins on the DualLite of current releases, &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;but it is not guaranteed for future ones. This is why it is is recommended &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;to follow&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #51626f; font-family: Verdana, sans-serif;"&gt;the “Hardware Development Guide for i.MX 6 …”.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Nov 2015 05:59:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DualLite-SATA-VP-and-SATA-VPH/m-p/395661#M57969</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-11-11T05:59:03Z</dc:date>
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