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    <title>topic imx6: Using secure interrupts in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394836#M57816</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;is there any special handling needed on i.MX6 to enable secure interrupts?&lt;/P&gt;&lt;P&gt;When I set a bit in ICDISRn, the corresponding interrupt is not serviced any more.&lt;/P&gt;&lt;P&gt;As soon as I switch it to non-secure, it works again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also tried to set FIQen, but also no FIQ arrives.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The CPU is (as out of reset) in secure mode, therefore I'd expect the interrupts to be serviced normal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 01 May 2015 05:02:57 GMT</pubDate>
    <dc:creator>bastian_schick</dc:creator>
    <dc:date>2015-05-01T05:02:57Z</dc:date>
    <item>
      <title>imx6: Using secure interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394836#M57816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;is there any special handling needed on i.MX6 to enable secure interrupts?&lt;/P&gt;&lt;P&gt;When I set a bit in ICDISRn, the corresponding interrupt is not serviced any more.&lt;/P&gt;&lt;P&gt;As soon as I switch it to non-secure, it works again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also tried to set FIQen, but also no FIQ arrives.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The CPU is (as out of reset) in secure mode, therefore I'd expect the interrupts to be serviced normal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 May 2015 05:02:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394836#M57816</guid>
      <dc:creator>bastian_schick</dc:creator>
      <dc:date>2015-05-01T05:02:57Z</dc:date>
    </item>
    <item>
      <title>Re: imx6: Using secure interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394837#M57817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok, was trapped by the debugger which displayed some register contains wrong.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 May 2015 08:12:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394837#M57817</guid>
      <dc:creator>bastian_schick</dc:creator>
      <dc:date>2015-05-01T08:12:56Z</dc:date>
    </item>
    <item>
      <title>Re: imx6: Using secure interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394838#M57818</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Do you still having troubles regarding secure interrupts? In case that yes, could you please post the updated status and specify if you are using a BSP or it is bare-metal?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards!&lt;/P&gt;&lt;P&gt;/Carlos&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 04 May 2015 17:23:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394838#M57818</guid>
      <dc:creator>CarlosCasillas</dc:creator>
      <dc:date>2015-05-04T17:23:03Z</dc:date>
    </item>
    <item>
      <title>Re: imx6: Using secure interrupts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394839#M57819</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Carlos, Even if 42' has found his answer, I am having a devil of a time finding documentation for how to use the FIQ functionality in the 3.0.35 Kernel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I started a thread here (&lt;A href="https://community.nxp.com/thread/354720"&gt;Intermittent Hangup on Custom Hardware&lt;/A&gt; ) but someone has marked it as assumed answered...&amp;nbsp; It ain't answered in any way, but if you read there I am thinking that an FIQ is a good approach to trapping my hangup since normal interrupts seem to be disabled when it happens.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you are still paying attention, I'll take any helpful guidance for getting FIQ working, or any other approach to trapping the issue there...&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 May 2015 17:50:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6-Using-secure-interrupts/m-p/394839#M57819</guid>
      <dc:creator>steveanderson</dc:creator>
      <dc:date>2015-05-15T17:50:08Z</dc:date>
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