<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Question, i.MX6S PUE/PKE setting</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392884#M57356</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your answer.&lt;/P&gt;&lt;P&gt;As for the other bit field than PKE/PUE bit fields in PAD control registers(IOMUXC_SW_PAD_CTL_PAD_DRAM_xxx) and in PAD group control registers(IOMUXC_SW_PAD_CTL_GRP_xxx), can I understand as the same?&lt;/P&gt;&lt;P&gt;I mean nothing happens in the viewpoint of electrical specification when same values are written.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 May 2015 00:42:26 GMT</pubDate>
    <dc:creator>Aemj</dc:creator>
    <dc:date>2015-05-26T00:42:26Z</dc:date>
    <item>
      <title>Question, i.MX6S PUE/PKE setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392882#M57354</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the electrical specification of the pads of i.MX6.&lt;/P&gt;&lt;P&gt;What my customer wants to know is;&lt;/P&gt;&lt;P&gt;Does the electrical specification change at the moment which PUE or PKE bit is re-written with the same values as written already?&lt;/P&gt;&lt;P&gt;Does it make sense?&lt;/P&gt;&lt;P&gt;In my customer’s lab, they found their software re-write some PUE/PKE settings on the DDR related pins with the same value after the setting is done already. And their product has been already shipped into market.&lt;/P&gt;&lt;P&gt;Properly speaking, the setting of second time should not be done because the second time is executed during the software is running with DDR memory.&lt;/P&gt;&lt;P&gt;Though the second setting is to re-write with the same value, they need to know if the writing to the register itself can impact the electrical specification at the moment of writing register.&lt;/P&gt;&lt;P&gt;If it can impact, they consider the firmware update because the change of electrical specification can occur during DDR access.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 May 2015 06:28:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392882#M57354</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2015-05-25T06:28:34Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S PUE/PKE setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392883#M57355</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi AVNET JAPAN FAE&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;when PUE or PKE bit is re-written with the same values as previously written,&lt;/P&gt;&lt;P&gt;nothing happens, electrical specifications do not change. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 May 2015 08:19:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392883#M57355</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-05-25T08:19:07Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S PUE/PKE setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392884#M57356</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your answer.&lt;/P&gt;&lt;P&gt;As for the other bit field than PKE/PUE bit fields in PAD control registers(IOMUXC_SW_PAD_CTL_PAD_DRAM_xxx) and in PAD group control registers(IOMUXC_SW_PAD_CTL_GRP_xxx), can I understand as the same?&lt;/P&gt;&lt;P&gt;I mean nothing happens in the viewpoint of electrical specification when same values are written.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 May 2015 00:42:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392884#M57356</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2015-05-26T00:42:26Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6S PUE/PKE setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392885#M57357</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miyamoto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes, nothing happens in the viewpoint of electrical specification when same values are written&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 May 2015 04:48:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6S-PUE-PKE-setting/m-p/392885#M57357</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-05-26T04:48:19Z</dc:date>
    </item>
  </channel>
</rss>

