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    <title>i.MX ProcessorsのトピックImx6Q usochronous transfer</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392727#M57315</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using imx6q usb as device controller. I configured end point 2 as isochronous out by writing appropriate endpoint control&amp;nbsp; register. I am playing &lt;SPAN style="font-size: 13.3333330154419px;"&gt; 44.1khz, 24 bit, stereo,wave fil;e from Windows media player.( bInterval set to 1 ms). In the device side I have performed the following steps.&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Prepare dtd with a 272 bytes of buffer&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Link dtd with isochronous out dqh.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;prime isochronous out end point. &lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;But we do not see iso out endpoint completion interrupt. Please let me know if I am missing something.&lt;/P&gt;&lt;P&gt;Thank you in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Barindam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 09 Apr 2015 12:24:15 GMT</pubDate>
    <dc:creator>binaeksarkar</dc:creator>
    <dc:date>2015-04-09T12:24:15Z</dc:date>
    <item>
      <title>Imx6Q usochronous transfer</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392727#M57315</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using imx6q usb as device controller. I configured end point 2 as isochronous out by writing appropriate endpoint control&amp;nbsp; register. I am playing &lt;SPAN style="font-size: 13.3333330154419px;"&gt; 44.1khz, 24 bit, stereo,wave fil;e from Windows media player.( bInterval set to 1 ms). In the device side I have performed the following steps.&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Prepare dtd with a 272 bytes of buffer&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Link dtd with isochronous out dqh.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;prime isochronous out end point. &lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;But we do not see iso out endpoint completion interrupt. Please let me know if I am missing something.&lt;/P&gt;&lt;P&gt;Thank you in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Barindam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 12:24:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392727#M57315</guid>
      <dc:creator>binaeksarkar</dc:creator>
      <dc:date>2015-04-09T12:24:15Z</dc:date>
    </item>
    <item>
      <title>Re: Imx6Q usochronous transfer</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392728#M57316</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there any buffer start address alignment and buffer length restriction in dtd for imx6q usb device controller?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Barindam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 12:28:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392728#M57316</guid>
      <dc:creator>binaeksarkar</dc:creator>
      <dc:date>2015-04-09T12:28:17Z</dc:date>
    </item>
    <item>
      <title>Re: Imx6Q usochronous transfer</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392729#M57317</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Binaek&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you are right, there are some alignment restrictions, from&amp;nbsp; &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;IMX6DQRM&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;p. 5391&amp;nbsp; The Endpoint Queue Head List must be aligned to a 2k boundary.&lt;/P&gt;&lt;P&gt;The dQH is a 48-byte data structure, but must be aligned on 64-byte&lt;/P&gt;&lt;P&gt;boundaries.&lt;/P&gt;&lt;P&gt;p.5418&amp;nbsp; Allocate 8-DWord dTD block of memory aligned to 8-DWord boundaries.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 Apr 2015 00:50:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Imx6Q-usochronous-transfer/m-p/392729#M57317</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-04-10T00:50:23Z</dc:date>
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