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    <title>topic Re: 4 video capture using MIPI-CSI2 port in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171490#M5624</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sebastien,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no this would not work. Each IPU can only handle two input streams simultaneously.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen / With best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;Senior Field Application Engineer&lt;/P&gt;&lt;P&gt;Freescale Halbleiter Deutschland GmbH&lt;/P&gt;&lt;P&gt;Schatzbogen 7&lt;/P&gt;&lt;P&gt;81829 Muenchen / GERMANY&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A href="www.freescale.com&amp;lt;" target="test_blank"&gt;www.freescale.com&amp;lt;&lt;/A&gt;;&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2F" rel="nofollow" target="_blank"&gt;http://www.freescale.com/&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tel: +49 (0) 89 92103 - 544&lt;/P&gt;&lt;P&gt;Fax: +49 (0) 89 92103 - 101&lt;/P&gt;&lt;P&gt;Mobile: +49 (0) 171 4665886&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All types of technical support (Schematic review, layout review, software review, hardware board and software) provided by Freescale Field application team are subject to Freescale's general Terms and Conditions unless superseded by a direct contract.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USt.-ID-Nr./VAT-ID-No. DE813898243&lt;/P&gt;&lt;P&gt;Steuernummer/Tax No. 143/138/30552&lt;/P&gt;&lt;P&gt;Sitz der Gesellschaft/Registered Office: München&lt;/P&gt;&lt;P&gt;Registergericht/Registered Court: Amtsgericht München HR B 151590&lt;/P&gt;&lt;P&gt;Geschäftsführer/General Manager: Jürgen Weyer, Daryl Raiford, Marie-Pascale Diez, John Holmes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This e-mail, and any associated attachments have been classified as:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Public&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Internal Use Only&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Confidential Proprietary&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 28 Mar 2013 09:25:35 GMT</pubDate>
    <dc:creator>astraub</dc:creator>
    <dc:date>2013-03-28T09:25:35Z</dc:date>
    <item>
      <title>4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171477#M5611</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We 'd like to realize real time souround view camera system by using 4 camera.&lt;/P&gt;&lt;P&gt;But i.MX6Q don't have 4 parallel video capture ports. Max 2 only. (=paralle1 and parallel2)&lt;/P&gt;&lt;P&gt;So Can we capture 4 camera signals simultaneously via MIPI-CSI2(4lane) ?&lt;/P&gt;&lt;P&gt;According to the reference manual,&amp;nbsp; it seem to accept&amp;nbsp; interleaved 4 streaming video data.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i.MX6Q SABRE-AI have MIPI connector.&amp;nbsp; We want to make 4 camera extension board use this port.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;kanou&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 10 Nov 2012 03:27:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171477#M5611</guid>
      <dc:creator>kanoumamoru</dc:creator>
      <dc:date>2012-11-10T03:27:57Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171478#M5612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kanou,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes, that should be possible. The MIPI-CSI-2 port knows up to 4 virtual channels. Those can be routed to the two IPU blocks (2 each). You need to make sure that each stream uses a different virtual channel. The IPU has to be set to accept two virtual channels each.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Attached a diagram I drew during a discussion with FIL about this topic. Hope this clarifies the isue. Note that the IPU will take care of converting the incoming format to either RGB8888 or YUV4:4.4 before writing the data into memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Andreas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Nov 2012 13:33:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171478#M5612</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2012-11-26T13:33:03Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171479#M5613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Andreas, Kanou, please inform me where I can purchase a MIPI-CSI2 camera that is cable-compatible with the i.MX6Q-SABRE boards.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Alison Chaiken&lt;/P&gt;&lt;P&gt;Embedded Software Division&lt;/P&gt;&lt;P&gt;Mentor Graphics&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-email-small" href="mailto:alison_chaiken@mentor.com"&gt;alison_chaiken@mentor.com&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Dec 2012 17:59:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171479#M5613</guid>
      <dc:creator>alisonchaiken_m</dc:creator>
      <dc:date>2012-12-13T17:59:27Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171480#M5614</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alison,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am not aware of a camera that would directly fit our interface. ADI offers a video decoder card that fits with the exception of the I2C lines being exchanged. So with a cable correcting this it would fit.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen&lt;/P&gt;&lt;P&gt;with best Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sent from my mobile device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Am 13.12.2012 um 19:00 schrieb "alisonchaiken_mentor" &amp;lt;&lt;/SPAN&gt;&lt;A class="jive-link-email-small" href="mailto:admin@community.freescale.com"&gt;admin@community.freescale.com&lt;/A&gt;&lt;SPAN&gt;&amp;lt;mailto:&lt;/SPAN&gt;&lt;A class="jive-link-email-small" href="mailto:admin@community.freescale.com"&gt;admin@community.freescale.com&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&amp;gt;:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/"&gt;https://community.nxp.com/&lt;/A&gt;4 video capture using MIPI-CSI2 port&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;created by alisonchaiken_mentor&amp;lt;&lt;/SPAN&gt;&lt;A _jive_internal="true" data-containerid="-1" data-containertype="-1" data-objectid="206734" data-objecttype="3" href="https://community.nxp.com/people/alisonchaiken_mentor"&gt;https://community.nxp.com/people/alisonchaiken_mentor&lt;/A&gt;&lt;SPAN&gt;&amp;gt; in i.MX Community - View the full discussion&amp;lt;&lt;/SPAN&gt;&lt;A _jive_internal="true" data-containerid="2004" data-containertype="14" data-objectid="301812" data-objecttype="1" href="https://community.nxp.com/thread/301812#309524"&gt;https://community.nxp.com/message/309524#309524&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Dec 2012 18:18:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171480#M5614</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2012-12-13T18:18:39Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171481#M5615</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a similar project I would like to work on so I would love to see how this works out...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In my project I want to attach atleast two cameras in a stereo scopic arrangement in each direction and process the two feeds to try and map out distances etc. Similar to Microsofts Kinect device but hopefully without needing additional sensors. Are the quad processor boards fast enough to process two pairs of Stereo scopic screens in an application like this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I basically want to build a surround image but want to use a total of 8 Cameras to build a fully 3D image with the consideration of item placement, distance and possible speed and direction. So it is similar but goes a step further.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Dec 2012 21:46:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171481#M5615</guid>
      <dc:creator>RodneyFulk</dc:creator>
      <dc:date>2012-12-13T21:46:48Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171482#M5616</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Did someone have already a solution to handle multiple video streams with an i.MX6?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Jan 2013 14:44:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171482#M5616</guid>
      <dc:creator>jvd</dc:creator>
      <dc:date>2013-01-14T14:44:44Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171483#M5617</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In our application we would like to acquire video streams from 4 analog cameras (a 4 channel video server).&lt;/P&gt;&lt;P&gt;I can understand how to handle the 4 stream from the mipi interface. But my question is:&lt;/P&gt;&lt;P&gt;How to have those 4 channels in the same mipi flux?&lt;/P&gt;&lt;P&gt;I mean i cannot find any video decoder with mipi output, ok i can solve it using a converter from parallel to mipi (several available on the market), but still i need something to multiplex the 4 single mipi stream to a single multiplexed mipi.&lt;/P&gt;&lt;P&gt;Do anybody know a chip to do that? &lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Feb 2013 15:07:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171483#M5617</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2013-02-08T15:07:12Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171484#M5618</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Omar,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you will need soem kind of FPGA in between the cameras and the MIPI CSI-2 port, as it will be also required to put the 4 cameras into 4 separate logical streams. I am not aware of any ready built solution for this. All my customers do this themselves.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greetings&lt;/P&gt;&lt;P&gt;Andreas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 Feb 2013 12:25:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171484#M5618</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-02-11T12:25:20Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171485#M5619</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes , that's what i think too, but it take time to do that..... and you know time is a problem always... &lt;/P&gt;&lt;P&gt;If you have any customer that can sell (give for free?) the IP to us, plese let me know.&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Feb 2013 13:22:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171485#M5619</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2013-02-13T13:22:42Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171486#M5620</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;maybe I saying a stupid thing, but IMx6Q has 4 mipi (data) lines .... could be possible to have the 4 stream on the 4 different lines? I mean not time multiplexing but lines multiplexing...&lt;/P&gt;&lt;P&gt;is it permitted by mipi? If yes is simpler to mux 4 streams (but i think they should ve sincronous...)....&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Feb 2013 15:38:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171486#M5620</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2013-02-14T15:38:54Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171487#M5621</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Omar,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no - this has nothing to do with the logical streams through MIPI. The number of lanes only determines the maximum throughput for all data.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Feb 2013 16:02:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171487#M5621</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-02-14T16:02:36Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171488#M5622</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;ok thanks... I understand: with 4 lines i caan keep the clock lower or i can have more speed with the same clock...&lt;/P&gt;&lt;P&gt;So the FPGA seems to be the only way...&lt;/P&gt;&lt;P&gt;OK thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Feb 2013 10:46:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171488#M5622</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2013-02-15T10:46:01Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171489#M5623</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In this scenario where 4 channels of MIPI are using the two IPUs, does this render the two CSI ports unusable or do they remain available?&amp;nbsp; We would like to make use of 4 channels of MIPI as well as two CSI ports simultaneously.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Mar 2013 17:59:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171489#M5623</guid>
      <dc:creator>sebastient</dc:creator>
      <dc:date>2013-03-27T17:59:01Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171490#M5624</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sebastien,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no this would not work. Each IPU can only handle two input streams simultaneously.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen / With best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;Senior Field Application Engineer&lt;/P&gt;&lt;P&gt;Freescale Halbleiter Deutschland GmbH&lt;/P&gt;&lt;P&gt;Schatzbogen 7&lt;/P&gt;&lt;P&gt;81829 Muenchen / GERMANY&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A href="www.freescale.com&amp;lt;" target="test_blank"&gt;www.freescale.com&amp;lt;&lt;/A&gt;;&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2F" rel="nofollow" target="_blank"&gt;http://www.freescale.com/&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tel: +49 (0) 89 92103 - 544&lt;/P&gt;&lt;P&gt;Fax: +49 (0) 89 92103 - 101&lt;/P&gt;&lt;P&gt;Mobile: +49 (0) 171 4665886&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All types of technical support (Schematic review, layout review, software review, hardware board and software) provided by Freescale Field application team are subject to Freescale's general Terms and Conditions unless superseded by a direct contract.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USt.-ID-Nr./VAT-ID-No. DE813898243&lt;/P&gt;&lt;P&gt;Steuernummer/Tax No. 143/138/30552&lt;/P&gt;&lt;P&gt;Sitz der Gesellschaft/Registered Office: München&lt;/P&gt;&lt;P&gt;Registergericht/Registered Court: Amtsgericht München HR B 151590&lt;/P&gt;&lt;P&gt;Geschäftsführer/General Manager: Jürgen Weyer, Daryl Raiford, Marie-Pascale Diez, John Holmes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This e-mail, and any associated attachments have been classified as:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Public&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Internal Use Only&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Confidential Proprietary&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Mar 2013 09:25:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171490#M5624</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-03-28T09:25:35Z</dc:date>
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    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171491#M5625</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;That makes sense, danke &lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;Andreas&lt;/SPAN&gt;.&amp;nbsp; Another related question though. If we're using both CSI parallel capture ports, one per IPU, are we still able to make use of the MIPI bridge to add an additional stream to one or both of the IPU?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Mar 2013 14:13:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171491#M5625</guid>
      <dc:creator>sebastient</dc:creator>
      <dc:date>2013-03-28T14:13:06Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171492#M5626</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sebastien,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;well – I would try to route the two parallel ports onto one IPU and MIPI on the other one. To my&lt;/P&gt;&lt;P&gt;knowledge you could mix them as well, but honestly – I would not want to have to set this up :smileywink:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen / With best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;Senior Field Application Engineer&lt;/P&gt;&lt;P&gt;Freescale Halbleiter Deutschland GmbH&lt;/P&gt;&lt;P&gt;Schatzbogen 7&lt;/P&gt;&lt;P&gt;81829 Muenchen / GERMANY&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A href="www.freescale.com&amp;lt;" target="test_blank"&gt;www.freescale.com&amp;lt;&lt;/A&gt;;&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2F" rel="nofollow" target="_blank"&gt;http://www.freescale.com/&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tel: +49 (0) 89 92103 - 544&lt;/P&gt;&lt;P&gt;Fax: +49 (0) 89 92103 - 101&lt;/P&gt;&lt;P&gt;Mobile: +49 (0) 171 4665886&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All types of technical support (Schematic review, layout review, software review, hardware board and software) provided by Freescale Field application team are subject to Freescale's general Terms and Conditions unless superseded by a direct contract.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USt.-ID-Nr./VAT-ID-No. DE813898243&lt;/P&gt;&lt;P&gt;Steuernummer/Tax No. 143/138/30552&lt;/P&gt;&lt;P&gt;Sitz der Gesellschaft/Registered Office: München&lt;/P&gt;&lt;P&gt;Registergericht/Registered Court: Amtsgericht München HR B 151590&lt;/P&gt;&lt;P&gt;Geschäftsführer/General Manager: Jürgen Weyer, Daryl Raiford, Marie-Pascale Diez, John Holmes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This e-mail, and any associated attachments have been classified as:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Public&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Internal Use Only&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Confidential Proprietary&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Mar 2013 14:28:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171492#M5626</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-03-28T14:28:00Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171493#M5627</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I didn't realize I could route both parallel ports to a single IPU.&amp;nbsp; That does seem the most logical, thanks again for your quick replies.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Mar 2013 14:30:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171493#M5627</guid>
      <dc:creator>sebastient</dc:creator>
      <dc:date>2013-03-28T14:30:53Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171494#M5628</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sebastien,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you are right …. it looks like only the MIPI CSI2 port can be switched to both CSIs ….&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen / With best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;Senior Field Application Engineer&lt;/P&gt;&lt;P&gt;Freescale Halbleiter Deutschland GmbH&lt;/P&gt;&lt;P&gt;Schatzbogen 7&lt;/P&gt;&lt;P&gt;81829 Muenchen / GERMANY&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A href="www.freescale.com&amp;lt;" target="test_blank"&gt;www.freescale.com&amp;lt;&lt;/A&gt;;&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2F" rel="nofollow" target="_blank"&gt;http://www.freescale.com/&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tel: +49 (0) 89 92103 - 544&lt;/P&gt;&lt;P&gt;Fax: +49 (0) 89 92103 - 101&lt;/P&gt;&lt;P&gt;Mobile: +49 (0) 171 4665886&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All types of technical support (Schematic review, layout review, software review, hardware board and software) provided by Freescale Field application team are subject to Freescale's general Terms and Conditions unless superseded by a direct contract.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USt.-ID-Nr./VAT-ID-No. DE813898243&lt;/P&gt;&lt;P&gt;Steuernummer/Tax No. 143/138/30552&lt;/P&gt;&lt;P&gt;Sitz der Gesellschaft/Registered Office: München&lt;/P&gt;&lt;P&gt;Registergericht/Registered Court: Amtsgericht München HR B 151590&lt;/P&gt;&lt;P&gt;Geschäftsführer/General Manager: Jürgen Weyer, Daryl Raiford, Marie-Pascale Diez, John Holmes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This e-mail, and any associated attachments have been classified as:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Public&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Internal Use Only&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Confidential Proprietary&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 Apr 2013 08:16:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171494#M5628</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-04-02T08:16:42Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171495#M5629</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andreas,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Just wanted to ensure I understand correctly.&amp;nbsp; We are able to capture two parallel camera interfaces as well as one or two MIPI streams concurrently on the i.MX6?&amp;nbsp; I'm looking at the block diagram in the i.MX6Q reference manual Figure 19-1, it shows CSI0-&amp;gt;IPU0 CSI1-&amp;gt;IPU1 and MIPI gasket to IPU0 and IPU1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much for your time,&lt;/P&gt;&lt;P&gt;Sébastien Taylor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Apr 2013 15:51:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171495#M5629</guid>
      <dc:creator>sebastient</dc:creator>
      <dc:date>2013-04-08T15:51:15Z</dc:date>
    </item>
    <item>
      <title>Re: 4 video capture using MIPI-CSI2 port</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171496#M5630</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sebastien,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;well, the hw connectivity allows for that – not so sure, if you can actually program the chains inside the IPU to do this.&lt;/P&gt;&lt;P&gt;Please ask an IPU expert for this. None of my customers ever tried that ….&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mit freundlichen Grüßen / With best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Andreas Straub&lt;/P&gt;&lt;P&gt;Senior Field Application Engineer&lt;/P&gt;&lt;P&gt;Freescale Halbleiter Deutschland GmbH&lt;/P&gt;&lt;P&gt;Schatzbogen 7&lt;/P&gt;&lt;P&gt;81829 Muenchen / GERMANY&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A href="www.freescale.com&amp;lt;" target="test_blank"&gt;www.freescale.com&amp;lt;&lt;/A&gt;;&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2F" rel="nofollow" target="_blank"&gt;http://www.freescale.com/&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tel: +49 (0) 89 92103 - 544&lt;/P&gt;&lt;P&gt;Fax: +49 (0) 89 92103 - 101&lt;/P&gt;&lt;P&gt;Mobile: +49 (0) 171 4665886&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All types of technical support (Schematic review, layout review, software review, hardware board and software) provided by Freescale Field application team are subject to Freescale's general Terms and Conditions unless superseded by a direct contract.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USt.-ID-Nr./VAT-ID-No. DE813898243&lt;/P&gt;&lt;P&gt;Steuernummer/Tax No. 143/138/30552&lt;/P&gt;&lt;P&gt;Sitz der Gesellschaft/Registered Office: München&lt;/P&gt;&lt;P&gt;Registergericht/Registered Court: Amtsgericht München HR B 151590&lt;/P&gt;&lt;P&gt;Geschäftsführer/General Manager: Jürgen Weyer, Daryl Raiford, Marie-Pascale Diez, John Holmes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This e-mail, and any associated attachments have been classified as:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Public&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Internal Use Only&lt;/P&gt;&lt;P&gt;Freescale Semiconductor Confidential Proprietary&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Apr 2013 15:54:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/4-video-capture-using-MIPI-CSI2-port/m-p/171496#M5630</guid>
      <dc:creator>astraub</dc:creator>
      <dc:date>2013-04-08T15:54:58Z</dc:date>
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