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    <title>topic Issue about Daisy-chain in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/386927#M56092</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,all&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In my opinion, when we use some pad's mux,we can select the pad and mux for the pad. And I think the mux can work,but why we need to select in the Daisy-chain register?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I think register is not necessary,could you give me a reason?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 08 Apr 2015 10:55:20 GMT</pubDate>
    <dc:creator>tony_l_cai</dc:creator>
    <dc:date>2015-04-08T10:55:20Z</dc:date>
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      <title>Issue about Daisy-chain</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/386927#M56092</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,all&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In my opinion, when we use some pad's mux,we can select the pad and mux for the pad. And I think the mux can work,but why we need to select in the Daisy-chain register?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I think register is not necessary,could you give me a reason?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Apr 2015 10:55:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/386927#M56092</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-04-08T10:55:20Z</dc:date>
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      <title>Re: Issue about Daisy-chain</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/386928#M56093</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pad can be connected to several internal modules, so for&lt;/P&gt;&lt;P&gt;module outputs there are no problems, since only one module&lt;/P&gt;&lt;P&gt;can be selected with IOMUX. If pad is configured as input,&lt;/P&gt;&lt;P&gt;Daisy-chain register is added to select one input from &lt;/P&gt;&lt;P&gt;several possible pads.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 01:11:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/386928#M56093</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-04-09T01:11:42Z</dc:date>
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      <title>Re: Issue about Daisy-chain</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730282#M213242</link>
      <description>&lt;P&gt;&amp;gt;&amp;nbsp;If pad is configured as input, Daisy-chain register is added to select one input from several possible pads.&lt;/P&gt;&lt;P&gt;This also means: if any pad is selected as a desired module port as per IOMUXC, it will &lt;EM&gt;only&lt;/EM&gt; be readable without further initialisation if the pad corresponds to the reset value of the appropriate SELECT_INPUT register! Am I right?&lt;/P&gt;&lt;P&gt;But more generally: in contrast with former MCU-families, modern MCUs can mux each pad individually to a range of port functions. This means that doubling a port feature is possible. No one would ever waste pads for doubling an output port. And doubling an input port is even a recipe for short circuits of internal buffers. No one would ever do this. NXP solves the latter problem. But where is the practical usage bonus? I don't see that.&lt;/P&gt;&lt;P&gt;Let me refer to the reference manual of the i.MX8plus. In section (table) 8.1.1.1. PDM_BIT_STREAM0 can be asssigned to six possible pads. Even all pads at the same time (which would make no sense at all without the "DAISY" feature). When I use the pad that is mentioned first, no further initialisaton of SELECT_INPUT is necessary.&lt;/P&gt;&lt;P&gt;The DAISY feature is explained in section 8.2.2.4. Here, what I wrote at the beginning is part of the description, but it suggests that the input register would only be needed if one is using the "daisy" feature.&lt;/P&gt;&lt;P&gt;The diagram is only in so far informative in that it shows that the input mux is not muxing pads, but muxing at an intermediate location.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Generally, the description lacks further information. Is daisy chain meant ad an internal feature or as facilitation of an external daisy chain, e.g. daisy chained SPI peripheral IC's? But in such a case one will hardly intend to add taps to a daisy chain. Hence, I question if DAISY is an appropriate term here. Simply input mux would fit better. Or am a missing a crucial "feature" point?&lt;/P&gt;</description>
      <pubDate>Wed, 27 Sep 2023 08:08:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730282#M213242</guid>
      <dc:creator>rjm</dc:creator>
      <dc:date>2023-09-27T08:08:25Z</dc:date>
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      <title>Re: Issue about Daisy-chain</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730314#M213246</link>
      <description>&lt;P&gt;The reference manual clearly shows what is&amp;nbsp;&lt;SPAN&gt;DAISY.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Have DAISY, have more choices to avoid conflict. Just like you can 1,2,3,4,5,6, you only have 6 choices. But if you separate two group 1,2 and group&amp;nbsp;&amp;nbsp;3,4,5,6. You will have 8 choices.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Not all of them have DAISY.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;List i.MX6Q, i.MX6SX, i.MX6ULL, i.MX8MP.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="x.png" style="width: 662px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/242869iDBDDC24CD5F9D4B7/image-size/large?v=v2&amp;amp;px=999" role="button" title="x.png" alt="x.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="x2.png" style="width: 696px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/242871i7F3C24ABF6819F9B/image-size/large?v=v2&amp;amp;px=999" role="button" title="x2.png" alt="x2.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="x3.png" style="width: 539px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/242872i3D1E67B4E59C0A75/image-size/large?v=v2&amp;amp;px=999" role="button" title="x3.png" alt="x3.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="x34.png" style="width: 678px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/242874i35D9118874CB2FF6/image-size/large?v=v2&amp;amp;px=999" role="button" title="x34.png" alt="x34.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 27 Sep 2023 08:53:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730314#M213246</guid>
      <dc:creator>Mestkim</dc:creator>
      <dc:date>2023-09-27T08:53:52Z</dc:date>
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    <item>
      <title>Re: Issue about Daisy-chain</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730372#M213251</link>
      <description>&lt;P&gt;The pages you extracted show the mux architecture in a little bit more detail. I was not aware of these diagrams - thanks for attending. This diagram also explicitly annotates the input mux to register names ending on SELECT_INPUT[n].&lt;/P&gt;&lt;P&gt;Sorry that I don't follow your explanation. Your grouping (2 and 4) suggests a multiplication of 2x4=8. Hence something with two four muxes followed by a two mux. But the diagram(s) do not show this. I'd appreciate it if anyone is able to provide a concise explanation that point out the extra of daisy beyond simple port input to pad select. Perhaps it's only a matter of so called &lt;EM&gt;curse of knowledge&lt;/EM&gt;&amp;nbsp;(of experts).&lt;/P&gt;&lt;P&gt;For my own better overview, I annotated the iMX8plus table 8.1.1.1 with (green) highlighting of &lt;EM&gt;port&lt;/EM&gt; entries that are also associated with an input mux. See the attached extraction of 25 table pages.&lt;/P&gt;&lt;P&gt;Edit: I made the following comments to the annotation in a text file:&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;EARC_PHY_SPDIF ?&amp;nbsp; (not found in 8.1.1.1)&lt;BR /&gt;ENET1_RXEN = ENET1_RGMII_RX_CTL&lt;BR /&gt;ENET_QOS_GMII_MDI_I = ENET_QOS_MDIO&lt;BR /&gt;USDHC3_CARD_DET = USDHC3_CD_B&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 27 Sep 2023 09:38:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-Daisy-chain/m-p/1730372#M213251</guid>
      <dc:creator>rjm</dc:creator>
      <dc:date>2023-09-27T09:38:38Z</dc:date>
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