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    <title>i.MX ProcessorsのトピックENET PTP 1588 problems / capture register</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ENET-PTP-1588-problems-capture-register/m-p/384154#M55630</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Using imx28 ENET PTP 1588 capture register - we found an intermittent problem:&lt;/P&gt;&lt;P&gt;Mode: 1e9 counting mode, 40MHz clockrate, external pps connected to event capture input&lt;/P&gt;&lt;P&gt;Intermittent, we read out a value from &lt;STRONG&gt;capture register&lt;/STRONG&gt; which is &lt;STRONG&gt;wrong by 128xxxxxx nanosecs&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;(workaround - ignore timestamps with impossible values)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="text-decoration: underline;"&gt;To round it up, I´d like to repeat the other problems already found / solved:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Another issue already addressed is that we need (with our configuration) a &lt;STRONG&gt;delay by 72ns&lt;/STRONG&gt; between &lt;STRONG&gt;setting capture bit&lt;/STRONG&gt; in ctrl register and &lt;STRONG&gt;readout of atime.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;(a workaround could be to write ctrl register 4 times minimum)&lt;/P&gt;&lt;P&gt;Anyway - reading out the nanosecs stamp can be time consuming using this scheme.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Further we observed that &lt;STRONG&gt;compare events &amp;lt;70ns dont´t trigger&lt;/STRONG&gt; the event output / generate an irq.&lt;/P&gt;&lt;P&gt;(workaround - avoid compare values below &amp;lt;100ns)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The example used in imx28 datasheet is based on a &lt;STRONG&gt;125MHz input clock &lt;/STRONG&gt;which is &lt;STRONG&gt;not possible&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;Up to now I have no clue how this speed can be accomplished - because an integer divide from 480MHz PLL doesn´t fit.&lt;/P&gt;&lt;P&gt;So we are using /12 and 40MHz clock to operate at nominal speed with 25ns increments - and use the alternate increment+freq for nanosecs correction.&lt;/P&gt;&lt;P&gt;Maybe the mentioned drawbacks don´t exist if running with higher speed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The linux ptp driver for mx6 was written in a different way -&amp;nbsp; using free-running 32bit counter.&lt;/P&gt;&lt;P&gt;Maybe people involved into writing that had some knowledge about ptp errata.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I posted this on imx6 group - because this device has similar PTP/ENET circuitry.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you observe similar behavior ?&lt;/P&gt;&lt;P&gt;Have you heard of some errata describing this ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;rgds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wolfgang Gaerber&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Nov 2014 16:20:34 GMT</pubDate>
    <dc:creator>wolfgang_gaerbe</dc:creator>
    <dc:date>2014-11-06T16:20:34Z</dc:date>
    <item>
      <title>ENET PTP 1588 problems / capture register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-PTP-1588-problems-capture-register/m-p/384154#M55630</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Using imx28 ENET PTP 1588 capture register - we found an intermittent problem:&lt;/P&gt;&lt;P&gt;Mode: 1e9 counting mode, 40MHz clockrate, external pps connected to event capture input&lt;/P&gt;&lt;P&gt;Intermittent, we read out a value from &lt;STRONG&gt;capture register&lt;/STRONG&gt; which is &lt;STRONG&gt;wrong by 128xxxxxx nanosecs&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;(workaround - ignore timestamps with impossible values)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="text-decoration: underline;"&gt;To round it up, I´d like to repeat the other problems already found / solved:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Another issue already addressed is that we need (with our configuration) a &lt;STRONG&gt;delay by 72ns&lt;/STRONG&gt; between &lt;STRONG&gt;setting capture bit&lt;/STRONG&gt; in ctrl register and &lt;STRONG&gt;readout of atime.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;(a workaround could be to write ctrl register 4 times minimum)&lt;/P&gt;&lt;P&gt;Anyway - reading out the nanosecs stamp can be time consuming using this scheme.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Further we observed that &lt;STRONG&gt;compare events &amp;lt;70ns dont´t trigger&lt;/STRONG&gt; the event output / generate an irq.&lt;/P&gt;&lt;P&gt;(workaround - avoid compare values below &amp;lt;100ns)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The example used in imx28 datasheet is based on a &lt;STRONG&gt;125MHz input clock &lt;/STRONG&gt;which is &lt;STRONG&gt;not possible&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;Up to now I have no clue how this speed can be accomplished - because an integer divide from 480MHz PLL doesn´t fit.&lt;/P&gt;&lt;P&gt;So we are using /12 and 40MHz clock to operate at nominal speed with 25ns increments - and use the alternate increment+freq for nanosecs correction.&lt;/P&gt;&lt;P&gt;Maybe the mentioned drawbacks don´t exist if running with higher speed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The linux ptp driver for mx6 was written in a different way -&amp;nbsp; using free-running 32bit counter.&lt;/P&gt;&lt;P&gt;Maybe people involved into writing that had some knowledge about ptp errata.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I posted this on imx6 group - because this device has similar PTP/ENET circuitry.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you observe similar behavior ?&lt;/P&gt;&lt;P&gt;Have you heard of some errata describing this ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;rgds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wolfgang Gaerber&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 16:20:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-PTP-1588-problems-capture-register/m-p/384154#M55630</guid>
      <dc:creator>wolfgang_gaerbe</dc:creator>
      <dc:date>2014-11-06T16:20:34Z</dc:date>
    </item>
    <item>
      <title>Re: ENET PTP 1588 problems / capture register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENET-PTP-1588-problems-capture-register/m-p/384155#M55631</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have been looking for records of similar issues and I have not found any.&lt;/P&gt;&lt;P&gt;I wonder if you can provide a detailed explanation of the steps to follow to reproduce the error.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Nov 2014 23:11:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENET-PTP-1588-problems-capture-register/m-p/384155#M55631</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2014-11-26T23:11:35Z</dc:date>
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