<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processorsのトピックdual voltage support on eMMC</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382932#M55277</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We're using an eMMC Memory on the eSDHC4 Interface on an iMX6Q. We do notice Problems when writing and/or reading to/from eMMC Memory. We are using a dual voltage supported eMMC Memory (Micron 2NM400FDB311), where the VCCQ can be 3.3V (normal Operation) or 1.8V in low-power Operation. Our design (unfortunately) only supports the 3.3V for the VDDQ supply.&lt;/P&gt;&lt;P&gt;Now my question is: Does the iMX6 notices, that the VDDQ is only 3.3V or is the iMX6 Interface switching into low power mode and expects 1.8V levekls as well as outputting (writing) with 1.8V Levels?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ingo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Nov 2014 09:26:55 GMT</pubDate>
    <dc:creator>inmaku</dc:creator>
    <dc:date>2014-11-06T09:26:55Z</dc:date>
    <item>
      <title>dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382932#M55277</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We're using an eMMC Memory on the eSDHC4 Interface on an iMX6Q. We do notice Problems when writing and/or reading to/from eMMC Memory. We are using a dual voltage supported eMMC Memory (Micron 2NM400FDB311), where the VCCQ can be 3.3V (normal Operation) or 1.8V in low-power Operation. Our design (unfortunately) only supports the 3.3V for the VDDQ supply.&lt;/P&gt;&lt;P&gt;Now my question is: Does the iMX6 notices, that the VDDQ is only 3.3V or is the iMX6 Interface switching into low power mode and expects 1.8V levekls as well as outputting (writing) with 1.8V Levels?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ingo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 09:26:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382932#M55277</guid>
      <dc:creator>inmaku</dc:creator>
      <dc:date>2014-11-06T09:26:55Z</dc:date>
    </item>
    <item>
      <title>Re: dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382933#M55278</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ingo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no i.MX6 uSDHC port does not change IO levels when entering&lt;/P&gt;&lt;P&gt;low power modes, also it is not automatic change. Please check&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=RDIMX6SABREAUTO&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab"&gt;i.MX6_SABRE_AI_DESIGNFILES&lt;/A&gt; &lt;IMG alt="" class="jiveImage" src="http://www.freescale.com/files/graphic/SECURITYINFOIMAGE.gif" /&gt; :&amp;nbsp; SPF-27142 p.6&lt;/P&gt;&lt;P&gt;NVCC_SD3 3.3v to 1.8V I/O logic level change is controlled by GPIO_18 by software.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 10:56:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382933#M55278</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-11-06T10:56:07Z</dc:date>
    </item>
    <item>
      <title>Re: dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382934#M55279</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your answer. I see, what you mean and yes, for the SDHC Card we did implement this voltage switch and thus can turn the voltage over from 3.3V to 1.8V. We do this for the SD Card, which is hooked-up to the SD2 Interface. But we also use an eMMC chip, which is hooked-up to SD4 Interface. Here I wonder if the Interface can be switched-over to 1.8V at all since the SD4 Interface is internally tied to the NVCC_NANDF rail - which we have tied to 3.3V.&lt;/P&gt;&lt;P&gt;CAn it possibly happen, that the chip is swithced over into the 1.8V Signal levelk mode (low-power) and teh CPU still writes in 3.3V?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks Igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 12:11:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382934#M55279</guid>
      <dc:creator>inmaku</dc:creator>
      <dc:date>2014-11-06T12:11:10Z</dc:date>
    </item>
    <item>
      <title>Re: dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382935#M55280</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ingo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;processor does not switches SD4 to 1.8V in low power modes.&lt;/P&gt;&lt;P&gt;If NVCC_NANDF tied to 3.3V and it powers&lt;/P&gt;&lt;P&gt;SD4, I do not think that SD4 can work with 1.8V levels.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 13:11:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382935#M55280</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-11-06T13:11:13Z</dc:date>
    </item>
    <item>
      <title>Re: dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382936#M55281</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Right - so far so good. My question was more like, if the controller automatically switches the 1.8V mode or if this is an explicit Operation done by the Software Driver?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ingo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 13:27:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382936#M55281</guid>
      <dc:creator>inmaku</dc:creator>
      <dc:date>2014-11-06T13:27:41Z</dc:date>
    </item>
    <item>
      <title>Re: dual voltage support on eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382937#M55282</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ingo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no it does not automatically switches the 1.8V mode.&lt;/P&gt;&lt;P&gt;Also Software Driver does not do it, though you can implement that,&lt;/P&gt;&lt;P&gt;however this solution is not typical.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 13:31:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/dual-voltage-support-on-eMMC/m-p/382937#M55282</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-11-06T13:31:51Z</dc:date>
    </item>
  </channel>
</rss>

