i.MX Processors中的主题 Re: Data throughput in i.MX6Q

Data throughput in i.MX6Q

norbertr — Tue, 26 Aug 2014 07:26:36 GMT

Hi,

In ERR004512 (ENET: 1 Gb Ethernet MAC (ENET) system limitation) I read about a problem with the Gigabit Ethernet interface.

Now I am not sure if the i.MX6 is suitable for my application:

-The i.MX6Q receives a datastram over Gigabit Ethernet. 1000 Byte each 40µs (200MBit/s) from a FPGA, just raw ethernet.

-This stream is transfered into DDR3-RAM to be buffered for some seconds (if possible by DMA).

-Task1 loads the stream from DDR3-RAM (if possible by DMA) to analyze the data (in worst case the full 200MBit/s).

-Task2 loads the stream from DDR3-RAM (if possible by DMA) to analyze the data (in worst case the full 200MBit/s).

-Task3 transfers the results from Task1 and Task2 into DDR3-RAM (in worst case the full 200MBit/s), where the data is buffered.

-Each 40µs 1000Byte from DDR3-RAM must be sent from Gigabit Ethernet to the FPGA.

This means, Gigabit Ethernet has to transfer 200MBit/s Full Duplex.

So 200MBit/s RX + 200MBit/s TX = 400MBit/s, what is almost the limit of the Errata.

Will the i.MX6 GbE be able to to transfer this highspeed data stream?

Where can I get more information about the GbE's limitations? Where does the bottleneck result from?

As you can see, the data must be transferred many times from and to DDR3-RAM.

Will the i.MX6 be able to do this? Would these transfers have negative effects to the GbE?

I will use a RTOS on the i.MX6Q.

Regards,

Norbert

igorpadykov — Tue, 26 Aug 2014 09:17:58 GMT

Hi Norbert

some real data GbE performance is given on link below

Seems only test on real hardware may answer your question since

i.MX6 architecture is quite complex for any theoretical predictions.

Best regards

chip

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abdelrahmanzaye — Tue, 14 Jul 2015 09:13:41 GMT

Hi ,
i have IMX6-quad and i want to chose the best compatible RTOS for it ?
can you kindly help me ?