i.MX ProcessorsのトピックHardware ECC Accelerator Layout Select Register https://community.nxp.com/t5/i-MX-Processors/Hardware-ECC-Accelerator-Layout-Select-Register/m-p/380234#M54828 <HTML><HEAD></HEAD><BODY><P>Hi community.</P><P></P><P><SPAN class="hps">IMX6DQ RM of sect 17.6.7 Hardware ECC Accelerator Layout Select Register</SPAN></P><P>of&nbsp; <SPAN class="hps">(BCH_LAYOUTSELECT),</SPAN></P><P><SPAN class="hps">Desclibed in </SPAN><SPAN class="hps">Chip Select</SPAN> <SPAN class="hps">of</SPAN> <SPAN class="hps">CS15 ~ CS0</SPAN> , <SPAN class="hps">as</SPAN> <SPAN class="hps">the</SPAN> <SPAN class="hps">ball</SPAN> <SPAN class="hps">function</SPAN> <SPAN class="hps">of</SPAN> <SPAN class="hps">iMX6,</SPAN> <SPAN class="hps">it is </SPAN> <SPAN class="hps">only</SPAN> <SPAN class="hps">NAND_CE3 ~ CE0.</SPAN></P><P></P><P>What is&nbsp; <SPAN class="hps">CS15 ~ 0</SPAN> ?</P></BODY></HTML> Thu, 12 Mar 2015 05:39:02 GMT takashitakahash 2015-03-12T05:39:02Z Hardware ECC Accelerator Layout Select Register https://community.nxp.com/t5/i-MX-Processors/Hardware-ECC-Accelerator-Layout-Select-Register/m-p/380234#M54828 <HTML><HEAD></HEAD><BODY><P>Hi community.</P><P></P><P><SPAN class="hps">IMX6DQ RM of sect 17.6.7 Hardware ECC Accelerator Layout Select Register</SPAN></P><P>of&nbsp; <SPAN class="hps">(BCH_LAYOUTSELECT),</SPAN></P><P><SPAN class="hps">Desclibed in </SPAN><SPAN class="hps">Chip Select</SPAN> <SPAN class="hps">of</SPAN> <SPAN class="hps">CS15 ~ CS0</SPAN> , <SPAN class="hps">as</SPAN> <SPAN class="hps">the</SPAN> <SPAN class="hps">ball</SPAN> <SPAN class="hps">function</SPAN> <SPAN class="hps">of</SPAN> <SPAN class="hps">iMX6,</SPAN> <SPAN class="hps">it is </SPAN> <SPAN class="hps">only</SPAN> <SPAN class="hps">NAND_CE3 ~ CE0.</SPAN></P><P></P><P>What is&nbsp; <SPAN class="hps">CS15 ~ 0</SPAN> ?</P></BODY></HTML> Thu, 12 Mar 2015 05:39:02 GMT https://community.nxp.com/t5/i-MX-Processors/Hardware-ECC-Accelerator-Layout-Select-Register/m-p/380234#M54828 takashitakahash 2015-03-12T05:39:02Z Re: Hardware ECC Accelerator Layout Select Register https://community.nxp.com/t5/i-MX-Processors/Hardware-ECC-Accelerator-Layout-Select-Register/m-p/380235#M54829 <HTML><HEAD></HEAD><BODY><P>&nbsp; Only CS0-CS3 bit fields of&nbsp; BCH_LAYOUTSELECT should be used for i.MX6<BR />&nbsp; <BR />Have a great day,<BR />Yuri</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Thu, 12 Mar 2015 06:26:53 GMT https://community.nxp.com/t5/i-MX-Processors/Hardware-ECC-Accelerator-Layout-Select-Register/m-p/380235#M54829 Yuri 2015-03-12T06:26:53Z