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    <title>i.MX Processors中的主题 Re: 3 Wire SPI Working</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378563#M54337</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Hi Yuri, Thank you for the reply....&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;After configure MOSI as open-drain, do we need to use Bit-Banging Technique ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Azlum&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Mar 2015 09:32:30 GMT</pubDate>
    <dc:creator>mohammedazlum</dc:creator>
    <dc:date>2015-03-12T09:32:30Z</dc:date>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378552#M54326</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Mohammed,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you tell me that, how did you connect 3-wire SPI into iMX6x processor ? The output/input line from the slave connected to which pin of processor (whether MISO or MOSI) ?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="3 wire SPI.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/51280i07E00E1276AE85E3/image-size/large?v=v2&amp;amp;px=999" role="button" title="3 wire SPI.png" alt="3 wire SPI.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2015 11:21:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378552#M54326</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-11T11:21:54Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378553#M54327</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/jamesbone"&gt;jamesbone&lt;/A&gt; , Can you please help?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2015 17:57:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378553#M54327</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2015-03-11T17:57:33Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378554#M54328</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Assuming i.MX6 is SPI master, You may configure its MOSI output as open drain one&lt;BR /&gt; (via ODE bit field of corresponding IOMUXC_SW_PAD_CTL_PAD register) and &lt;BR /&gt; connect together i.MX6 MOSI, MISO and external SPI device I/O [I/P &amp;amp; O/P].&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;If needed, external device I/O should be configured for open drain too.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; When configuring GPIO, the Processor Expert for i.MX&amp;nbsp; may be useful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;A class="jive-link-external-small" href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PROCESSOR-EXPERT-IMX" target="_blank"&gt;http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PROCESSOR-EXPERT-IMX&lt;/A&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;A class="jive-link-wiki-small" data-containerid="51688" data-containertype="700" data-objectid="101470" data-objecttype="102" href="https://community.freescale.com/docs/DOC-101470"&gt;https://community.freescale.com/docs/DOC-101470&lt;/A&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt; Also, the following app note helps to setup pin’s electrical properties. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;“Influence of Pin Setting on System Function and Performance”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN style="font-size: 12.0pt; font-family: 'Verdana','sans-serif';"&gt;&lt;A class="jive-link-external-small" href="http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf" target="_blank"&gt;http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 06:07:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378554#M54328</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T06:07:28Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378555#M54329</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mohammad,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have imx28 customized board. LCDIF was interfaced to 3 wire spi display panel. The input/output line from the slave connected to both the pins i.e MISO and MOSI. Even in your case it should be connected like that.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 07:34:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378555#M54329</guid>
      <dc:creator>ask</dc:creator>
      <dc:date>2015-03-12T07:34:16Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378556#M54330</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Yuri,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So iMX6x MISO and MOSI need to be shorted together and finally connect to 3-wire SPI slave bidirectional data line (I/P &amp;amp; O/P line). Is it like that ?&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Then MOSI need to be configured as GPIO. Then what about &lt;/SPAN&gt;&lt;SPAN style="font-size: 13.3333330154419px;"&gt;MISO ? This pin no need to configure as anything ? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 07:41:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378556#M54330</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T07:41:32Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378557#M54331</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ask,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you share the schematic portion to me ? Did you short MISO and MOSI of iMX6 and finally connected to 3-wire Slave bidirectional data line?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 07:43:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378557#M54331</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T07:43:00Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378558#M54332</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; To avoid contention, output signals / pins should be configured as open drain.&lt;BR /&gt;It may be done for any pin functionality.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 08:31:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378558#M54332</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T08:31:24Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378559#M54333</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Yuri,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I configure MISO and MOSI as open drain, then the Master and Slave communication will be out of SPI protocol. &lt;/P&gt;&lt;P&gt;i.e, one side (Slave side) is 3-wire SPI interface and another side (Master side) is open drain interface. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Whether my statement is correct ? &lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 08:47:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378559#M54333</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T08:47:36Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378560#M54334</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The open drain just provides physical level of a communication protocol.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 09:03:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378560#M54334</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T09:03:36Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378561#M54335</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i.e iMX6 SPI MOSI and MISO short together and configure &lt;SPAN style="font-size: 13.3333330154419px;"&gt;MOSI &lt;/SPAN&gt;as open-drain mode. In other words, SPI with &lt;SPAN style="font-size: 13.3333330154419px;"&gt;MOSI &lt;/SPAN&gt;open-drain mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What about MISO ? No need to configure as anything ? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Based on your input I modified my wiring diagram. Can you review the same ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPI-3 wire open mode.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/51316i0F4142F61B6E5B8F/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPI-3 wire open mode.png" alt="SPI-3 wire open mode.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 09:17:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378561#M54335</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T09:17:00Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378562#M54336</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12px; background-color: #f6f6f6;"&gt;What about MISO ? No need to configure as anything ?&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Correct, no need to configure input.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 09:21:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378562#M54336</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T09:21:57Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378563#M54337</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Hi Yuri, Thank you for the reply....&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;After configure MOSI as open-drain, do we need to use Bit-Banging Technique ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;Azlum&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 09:32:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378563#M54337</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T09:32:30Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378564#M54338</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When MOSI drive signal, the same signal can be feed into slave input and MISO of master. Is it create any problem or conflict ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 09:58:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378564#M54338</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T09:58:47Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378565#M54339</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;No bit-banging needed. But pull up resistors (as for I2C) should be provided.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 10:01:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378565#M54339</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T10:01:31Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378566#M54340</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I do not think so.&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 10:02:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378566#M54340</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-03-12T10:02:08Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378567#M54341</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mohammed,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;We did n't use the iMx6 and used imx28. &lt;BR /&gt;In my case slave is a output device and has unidirectional communication. Slave data input/output connected to MISO and MOSI pins of a Master.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 10:02:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378567#M54341</guid>
      <dc:creator>ask</dc:creator>
      <dc:date>2015-03-12T10:02:35Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378568#M54342</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ask,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If slave is output device, why did you short MISO and MOSI together? I think you can connect salve output line to MISO directly and leave MOSI as open.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 10:13:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378568#M54342</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2015-03-12T10:13:12Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378569#M54343</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Azlum,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am also working on 3-Wire SPI. I read your posts. Can you clarify my doubts.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have imx6 board with MOSI and MISO both Connected to SDI and SDO of LCD (Slave device).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On the slave side , SDO and SDI are connected together&amp;nbsp; where SDO is connected via a resistor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My query is&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) How will I tell linux kernel to use SPI-3 Wire mode&lt;/P&gt;&lt;P&gt;2) As per your previous discussion, MOSI should be connected via a resistor.?&lt;/P&gt;&lt;P&gt;3) In my case MISO is connected to SDO which is connected to SDI via a resistor(different from your case). Will that work out?&lt;/P&gt;&lt;P&gt;4) Bitbanging is only required if I don t connect MOSI to MISO via a resistor ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/30984i2FC0CAF03464665B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 09 May 2015 06:43:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/378569#M54343</guid>
      <dc:creator>jamesdeepu</dc:creator>
      <dc:date>2015-05-09T06:43:30Z</dc:date>
    </item>
    <item>
      <title>Re: 3 Wire SPI Working</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/1155841#M162147</link>
      <description>&lt;P&gt;iMX6x MISO and MOSI need to be shorted I have the same &lt;A href="https://911electronic.com/spi-communication-how-spi-works/" target="_self"&gt;3 wire sp&lt;/A&gt;i connection in my application&lt;/P&gt;</description>
      <pubDate>Sun, 20 Sep 2020 13:54:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Re-3-Wire-SPI-Working/m-p/1155841#M162147</guid>
      <dc:creator>Halotem12</dc:creator>
      <dc:date>2020-09-20T13:54:10Z</dc:date>
    </item>
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