i.MX Processors中的主题 Re: i.MX538 PoP with LPDDR2 issue

i.MX538 PoP with LPDDR2 issue

PatrickLin — Fri, 09 Nov 2012 09:08:43 GMT

Hi all,

We have designed our custom board with i.MX538 PoP with LPDDR2. We are trying to reduce the device sleep current by setting the LPDDR2 RAM into self refresh mode during the power down mode. But we have encountered problem that the system cannot wake up after that. Anyone have experience the same problem?

Please advise.

Thanks.

Re: i.MX538 PoP with LPDDR2 issue

jimmychan — Thu, 15 Nov 2012 03:23:07 GMT

Could you tell me more information?

1. which board (QSB or SMD) you take it for your design reference?

2. which BSP are you using?

Re: i.MX538 PoP with LPDDR2 issue

PatrickLin — Mon, 19 Nov 2012 03:50:56 GMT

Hi Jimmy,

1) For PMIC part, we reference to QSB with DA9053. For LPDDR2 part, we reference to freescale drawing title "XMCIMX538-POP (SCH-26782).

2) We are using Android BSP version 10.3.

3) We are using Micron LPDDR2 MT42L64M32D1KL-3 IT:A

Thanks.

Re: i.MX538 PoP with LPDDR2 issue

jimmychan — Tue, 20 Nov 2012 09:07:58 GMT

Have you try the R10.3.2? Or try the R10.4?

Re: i.MX538 PoP with LPDDR2 issue

PatrickLin — Mon, 26 Nov 2012 03:24:54 GMT

Hi Jimmy,

We have tried on R10.3.2 with same result. Any suggestion?

Thanks.

Re: i.MX538 PoP with LPDDR2 issue

TureNielsen — Mon, 26 Nov 2012 14:23:58 GMT

Hi,

Have you ensured that you have the correct voltages on the memory in refresh mode?

Regards

Ture

Re: i.MX538 PoP with LPDDR2 issue

TheAdmiral — Wed, 28 Nov 2012 22:51:00 GMT

I can try to help, but I really don't have any experience with this issue. This is really being done all in software (ie, you are placing LPDDR2 in self-refresh with a software command).

So how is the LPDDR2 placed into self-refresh: Setting MCR0[FLPMD] in the M4IF block?

And how do you think that the LPDDR2 is coming out of self-refresh upon coming out of Deep Sleep Mode?

Cheers,

Mark