i.Mx6 SPI-Slave interrupts

arti — Fri, 22 Aug 2014 13:19:23 GMT

Hi All,

I am currently working on i.Mx6 SPI-Slave and I am able to communicate with Master.

(When I transmit 5 data from Master, Test register Rx count will also read as 5 and so on)

If I continuously transmit data from Master, RxFifo gets full and when I poll for the status register, status RO gets set. (as expected)

But I am neither getting ROEN nor RFEN interrupts.

Have any one faced similar issue before with iMx6 SPI.

Whenever I start the device I get a TC interrupt and I dont receive subsequent interrupts..

Initialization process that I have followed right now

Disable ECSPI block
Enable ECSPI
Enable clock
Set control and config registers: SPI burst length set is 32 bit (1f)
Enabled interrupts for ROEN, RFEN, RDREN, RREN

Please let me know if you need detailed configuration.

Thanks in advance.

Arti

Re: i.Mx6 SPI-Slave interrupts

robert99 — Mon, 28 Sep 2015 13:11:03 GMT

Hello Arti,

I'm just curious about your success writing an i.MX6 SPI Slave driver supporting Interrupts? Can you give me a brief conclusion about your experiences? Did you also use DMA?

Thank's a lot,

Robert

i.MX Processors中的主题 i.Mx6 SPI-Slave interrupts

i.Mx6 SPI-Slave interrupts

Re: i.Mx6 SPI-Slave interrupts