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    <title>topic Re: i.MX6SDL dual camera imput. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375503#M53817</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Takashi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for new subject please create new Community thread.&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI';"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Nov 2014 08:33:56 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2014-11-06T08:33:56Z</dc:date>
    <item>
      <title>i.MX6SDL dual camera imput.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375500#M53814</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P align="left" style="background: white; text-align: left;"&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI'; mso-bidi-font-size: 10.5pt; mso-font-kerning: 0pt;"&gt;I think i.MX6SDL&lt;/SPAN&gt; is available in VGA size dual-camera input.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P align="left" style="background: white; text-align: left;"&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI'; mso-bidi-font-size: 10.5pt; mso-font-kerning: 0pt;"&gt;Is The below bit rate calculation correct ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P align="left" style="background: white; text-align: left;"&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI'; mso-bidi-font-size: 10.5pt; mso-font-kerning: 0pt;"&gt; CSI_0 and 1 use dual camera imput&amp;nbsp; and format is BT656&amp;nbsp; in VGA size@30fps .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P align="left" style="background: white; text-align: left;"&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI'; mso-bidi-font-size: 10.5pt; mso-font-kerning: 0pt;"&gt;640*480*30fps*8bit*2camera=147.4Mpix/sec.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 04 Nov 2014 05:31:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375500#M53814</guid>
      <dc:creator>takashitakahash</dc:creator>
      <dc:date>2014-11-04T05:31:00Z</dc:date>
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    <item>
      <title>Re: i.MX6SDL dual camera imput.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375501#M53815</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Takashi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this will be supported&lt;/P&gt;&lt;P&gt;correct will be &lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI';"&gt;640*480 pix*30fps*2camera=18.432Mpix/sec.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI';"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 04 Nov 2014 06:10:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375501#M53815</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-11-04T06:10:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SDL dual camera imput.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375502#M53816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt; &lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;Hi Igor,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;Thank you for your support.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;I have 3 additional questions.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;1, Description of IMX6SDL RM of Table 38-29. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;IPU's capture flows &lt;/SPAN&gt;&lt;SPAN style="font-size: 11pt;"&gt;『&lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;Capturing interlaced input and&lt;BR /&gt;storing it in the memory (via VDIC) while performing video de-interlacing in&lt;BR /&gt;the VDIC.&lt;/SPAN&gt;&lt;SPAN style="font-size: 11pt;"&gt;』 in 『&lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;Interlaced input coming from one of the CSIs is sent to the memory without processing via channel #13. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="font-family: 'Arial','sans-serif'; font-size: 11pt; mso-ascii-theme-font: minor-latin; mso-hansi-theme-font: minor-latin; mso-bidi-theme-font: minor-latin;"&gt;Below in my understanding is correct?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-font-kerning: 0pt; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;Table 38-9 listed IDMAC DMA channels list, IDMAC_CH_13 at the VDIC Source and Destination are Fmem.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;However&lt;/SPAN&gt;, correct in understanding that the real CH_13 at the CSI Source, Destination Fmem, en route via the VDIC, so Source listed the VDIC?&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN lang="EN-US" style="font-size: 11pt;"&gt;And &lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;Using&lt;/SPAN&gt; a CH_13, CSI → VDIC transfer, without the IDMAC of another channel?.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; &lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;2, In&lt;/SPAN&gt; the VDIC, without any De-interlacing On the Fly,&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt; That&lt;/SPAN&gt; is correct understanding?&lt;/P&gt;&lt;P&gt; &lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt; When capturing simultaneously CSI1, both CSI0 and CSI1 using IDMAC CH_13 into the via the VDIC Fmem.&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt; &lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;&amp;nbsp;&amp;nbsp; And &lt;/SPAN&gt;&lt;SPAN class="hps"&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt;VDIC&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt; &lt;SPAN class="hps"&gt;is&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;de-interlacing &lt;/SPAN&gt;&lt;SPAN class="hps"&gt;at once only of 1 ch&lt;/SPAN&gt;, &lt;SPAN class="hps"&gt;even&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;if can be relay to&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;the above&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;CSI → Fmem&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;and&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;will be&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;2ch&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;at the same time&lt;/SPAN&gt;?&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-size: 11pt; mso-fareast-font-family: 'Meiryo UI'; mso-bidi-font-family: Arial; mso-bidi-theme-font: minor-latin;"&gt;3, When&lt;/SPAN&gt; capturing BT.656 from CSI1, CSI0 2-channel sametime, route and IDMAC channel in the below mentioned correct? &lt;/P&gt;&lt;OL style="list-style-type: lower-alpha;"&gt;&lt;LI&gt;&lt;SPAN class="hps"&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt;CSI0 or 1 →VDIC (IDMAC_CH_13, De-interlacing&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt; &lt;SPAN class="hps"&gt;in the&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;On thefly),&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="hps"&gt;VDIC → Fmem (IDMAC_CH_5)&lt;/SPAN&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class="hps"&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt;CSI1 or 0 →&lt;BR /&gt;VDIC&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN lang="EN" style="color: #222222; font-size: 11pt;"&gt; &lt;SPAN class="hps"&gt;via&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;→ Fmem (IDMAC_CH_13), Fmem → VDIC (CH_8),&lt;BR /&gt;VDIC → Fmem (CH_5)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="hps"&gt;In&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;it&lt;/SPAN&gt; &lt;SPAN class="hps"&gt;correct?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 06:43:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375502#M53816</guid>
      <dc:creator>takashitakahash</dc:creator>
      <dc:date>2014-11-06T06:43:50Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SDL dual camera imput.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375503#M53817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Takashi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for new subject please create new Community thread.&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="color: #444444; font-family: 'Meiryo UI';"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Nov 2014 08:33:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-dual-camera-imput/m-p/375503#M53817</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-11-06T08:33:56Z</dc:date>
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