topic Re: Questions about BT_CFG design in i.MX Processors

Questions about BT_CFG design

王剑翰 — Tue, 04 Nov 2014 03:05:32 GMT

Background:
CPU：MCIMX6S5EVM10AB
Board design reference: SPF-27516_C3(Sabre-SDB)

Questions:

1，Customer want to set BT_CFG1_1(EIM_DA1) as high. Is it OK?

The reference schematics is set as DNP.

2, Customer's eMMC BUS width is set as 4bit, but customer set BT_CFG[7:5]=010:

The above image is from SPF-27516_C3 reference schematics. Should the BT_CFG[6:5] value change to x1?

3, For the BT_CFG3 and BT_CFG4, can they be set as NC?

jimmychan — Tue, 04 Nov 2014 04:05:17 GMT

1. The Table 8-15 in the Reference Manual.

2. For 4-bit, BT_CFG2_5 should be = 1

3. No. Please connect the pull-up/pull-down resistors for the options that you needed.

igorpadykov — Tue, 04 Nov 2014 04:25:47 GMT

Hi 王剑翰

1. I am afraid not, because EIM_DA1 BOOT_CFG1[1]

selects SD/eMMC Power Cycle Enable

Table 8-15. USDHC Boot eFUSE Descriptions IMX6SDLRM

2. yes for 4-bit width BT_CFG[6:5] value change to x1

3. BT_CFG3 and BT_CFG4 can be set as NC

Best regards

igor

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jimmychan — Tue, 04 Nov 2014 06:04:33 GMT

According to the i.MX6 Hardware Design guide (IMX6DQ6SDLHDG.pdf), the boot_cfg signals should not be left floating.