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    <title>topic i.MX6SDL GPIO unexpected behavior. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372963#M53347</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our partner met a problem when I use a GPIO function of i.MX6.&lt;/P&gt;&lt;P&gt;Value of GPIO_DRI was cleared when I switched GPIO_GDIR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Initialization flow was the following procedure.&lt;/P&gt;&lt;P&gt;① set value of GPIO_DR&lt;/P&gt;&lt;P&gt;② set value of GPIO_GDIR&lt;/P&gt;&lt;P&gt;But I set a port to 1 (high) and set GPIO_GDIR to 1 (output) of after that, then GPIO_DR value switched to 0 and it output low (our partner want to high signal).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As long as I read datasheet, I think that the above behavior doesn't occur.&lt;/P&gt;&lt;P&gt;Do you know the reason why the above behavior occurs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, if I set value of GPIO_GDIR before I set value of GPIO_DR(29.4.2.2 GPIO Write Mode in i.MX 6Solo/6DualLite Applications Processor Reference Manual Rev.1, 04/2013), I think that a pulse exists for a moment.&lt;/P&gt;&lt;P&gt;In this case, Do you know how to prevent the pulse?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 13 Feb 2015 00:57:45 GMT</pubDate>
    <dc:creator>satoshishimoda</dc:creator>
    <dc:date>2015-02-13T00:57:45Z</dc:date>
    <item>
      <title>i.MX6SDL GPIO unexpected behavior.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372963#M53347</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our partner met a problem when I use a GPIO function of i.MX6.&lt;/P&gt;&lt;P&gt;Value of GPIO_DRI was cleared when I switched GPIO_GDIR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Initialization flow was the following procedure.&lt;/P&gt;&lt;P&gt;① set value of GPIO_DR&lt;/P&gt;&lt;P&gt;② set value of GPIO_GDIR&lt;/P&gt;&lt;P&gt;But I set a port to 1 (high) and set GPIO_GDIR to 1 (output) of after that, then GPIO_DR value switched to 0 and it output low (our partner want to high signal).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As long as I read datasheet, I think that the above behavior doesn't occur.&lt;/P&gt;&lt;P&gt;Do you know the reason why the above behavior occurs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, if I set value of GPIO_GDIR before I set value of GPIO_DR(29.4.2.2 GPIO Write Mode in i.MX 6Solo/6DualLite Applications Processor Reference Manual Rev.1, 04/2013), I think that a pulse exists for a moment.&lt;/P&gt;&lt;P&gt;In this case, Do you know how to prevent the pulse?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Feb 2015 00:57:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372963#M53347</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2015-02-13T00:57:45Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SDL GPIO unexpected behavior.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372964#M53348</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Please try to enable GPIO module clocks before GPIO initialization.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;//=============================================================================&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;// Enable all clocks (they are disabled by ROM code)&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//=============================================================================&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4068 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c406c =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4070 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4074 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4078 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c407c =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4080 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4084 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Apr 2015 08:10:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372964#M53348</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-04-20T08:10:51Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SDL GPIO unexpected behavior.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372965#M53349</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4084 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is no register on 0x020c4084.&lt;/P&gt;&lt;P&gt;Was this typo? Should we set 0xffffffff to 0x020c4088 (CCM_CMEOR register) instead of 0x020c4084?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jun 2015 05:04:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372965#M53349</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2015-06-10T05:04:27Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6SDL GPIO unexpected behavior.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372966#M53350</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt; Yes, "&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x020c4084 =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xffffffff&lt;/SPAN&gt;"&amp;nbsp; should be removed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Jun 2015 08:37:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6SDL-GPIO-unexpected-behavior/m-p/372966#M53350</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-06-11T08:37:10Z</dc:date>
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