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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: IPU2 parallel port on IMX6Q in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371859#M53115</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;this seems to be the solution for the raw acquisition:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/327070"&gt;imx6 support for 8-bit RAW camera&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 Sep 2014 14:50:14 GMT</pubDate>
    <dc:creator>Selea</dc:creator>
    <dc:date>2014-09-23T14:50:14Z</dc:date>
    <item>
      <title>IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371846#M53102</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear All,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Now we are working to our custom board. The hardware is close to nitrogen6x board from boundary, but with the phytec flexboard as module on it.&lt;/P&gt;&lt;P&gt;We would like to use the second parallel sensor board because we already have another sensor (well a video converter) on the first parallel (IPU1/CSI0)&lt;/P&gt;&lt;P&gt;so we need another parallel sensor interface.&lt;/P&gt;&lt;P&gt;we are using as a base the 3.10.17-1.0.1-GA&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I wrote my own driver for the sensor we planned to use , but basically it is the same of ov5640.c (parallel version)&lt;/P&gt;&lt;P&gt;i modify the DTS files adding our sensor and using the nitrogen6x as reference with minor change on pin mux.&lt;/P&gt;&lt;P&gt;from DTS:&lt;/P&gt;&lt;P&gt;pin muxing:&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;ar0134&amp;nbsp; {&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&amp;nbsp; pinctrl_ar0134: pinctrl_ar0134 {&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; fsl,pins = &amp;lt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A24__IPU2_CSI1_DATA19&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_DA10__IPU2_CSI1_DATA_EN&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xb0b1&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt;&lt;/TD&gt;&lt;TD style=""&gt; &amp;gt;;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style=""&gt;&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD style=""&gt; };&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;from DTS add the sensor on I2c:&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;amp;i2c3 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_i2c3&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-frequency = &amp;lt;100000&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ar0134: ar0134@10 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "apti,ar0134";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; reg = &amp;lt;0x10&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ar0134&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ipu1_2&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks = &amp;lt;&amp;amp;clk27m 0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clock-names = "csi_mclk";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //DOVDD-supply = &amp;lt;&amp;amp;vgen4_reg&amp;gt;; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //AVDD-supply = &amp;lt;&amp;amp;vgen3_reg&amp;gt;;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //DVDD-supply = &amp;lt;&amp;amp;vgen2_reg&amp;gt;;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //pwn-gpios = &amp;lt;&amp;amp;gpio1 16 1&amp;gt;;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //rst-gpios = &amp;lt;&amp;amp;gpio1 17 0&amp;gt;;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_id = &amp;lt;1&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; csi_id = &amp;lt;1&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk = &amp;lt;27000000&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mclk_source = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;the driver is loaded correctly, it see the sensor and the v4l2 create the /dev/video3 , when i try to acquire something from that device (with gstreamer or just cat it).&lt;/P&gt;&lt;P&gt;I always have back "ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0"&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;attached here you can see the DTS files I'm using and also the driver.&lt;/P&gt;&lt;P&gt;it seems the something is still not configured proprely on the second CSI parallel port so it dosn't acquire.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;the signal from the sensor are correct (Vsync,Hsync,pixclk) and also the data_en seems to be ok, i tried also to negate it in the SENS_CONF register of the IPU_CSI&lt;/P&gt;&lt;P&gt;I would like to know which are the changes needed to be made in order to get IPU2/CSI1 working as the device is being correctly loaded, however it cannot be feed by any frame.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks to all&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336534"&gt;ar0134.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336534"&gt;Kconfig.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336534"&gt;Makefile.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336534"&gt;imx6q-phytec-pbab01.dts.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336534"&gt;imx6qdl-phytec-pfla02.dtsi.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Sep 2014 13:23:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371846#M53102</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-16T13:23:44Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371847#M53103</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;an update:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the sensor AR0134 is a BW sensor so the output is YYYYYYY and not YUYV. SO in my driver there wea an error:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;//ar0134_data.pix.pixelformat = V4L2_PIX_FMT_YUYV;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ar0134_data.pix.pixelformat = V4L2_PIX_FMT_GREY;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but still i have the same error&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;just to ASK... the DATA_EN is used or not in parallel mode in the CSI (i read different ideas on different threads)? On my hardware is pulled low, &lt;/P&gt;&lt;P&gt;i tried to set the bit 31 in the SENS_CONF register but nothing change...&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Sep 2014 12:32:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371847#M53103</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-17T12:32:14Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371848#M53104</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can you, please, see if this DOC can help you?&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-102133" title="https://community.freescale.com/docs/DOC-102133"&gt;https://community.freescale.com/docs/DOC-102133&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Sep 2014 13:42:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371848#M53104</guid>
      <dc:creator>daiane_angolini</dc:creator>
      <dc:date>2014-09-18T13:42:11Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371849#M53105</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Time to merge that patch in the kernel. I think several people on this community are trying to make the second parallel CSI port working.....&lt;/P&gt;&lt;P&gt;Great job!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Sep 2014 13:44:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371849#M53105</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-18T13:44:21Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371850#M53106</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Now i will test and I will let you know. But it looks good way to fix it.&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Sep 2014 13:58:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371850#M53106</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-18T13:58:44Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371851#M53107</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;the patch doesn't apply directly to 3.10.17_1.0.1_ga... some minor difference... I'm trying to fix.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Sep 2014 14:50:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371851#M53107</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-18T14:50:03Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371852#M53108</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;ops, i apllied to the boundary 3.10.17_1.0.1_ga kernel tree... on that there are more committ...sio it is slighty different from the freescale one... Anyway is possible to adapt.&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Sep 2014 15:18:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371852#M53108</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-18T15:18:23Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371853#M53109</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;well... I adapted the patch to the boundary kernel, but still i cannot acquire from the IPU1/CSI1 parallel...&lt;/P&gt;&lt;P&gt;still working on it..&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Sep 2014 12:43:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371853#M53109</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-19T12:43:27Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371854#M53110</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It is important for me to understand the configuration of the polarity of sync signal.It is not clear at all in the reference manual.&lt;/P&gt;&lt;P&gt;in the SENS_CONF register description they say just if you write a "1" in that bit the signal is inverted before pass it to the internal circuitry...&lt;/P&gt;&lt;P&gt;Ok but means active high or active low?&lt;/P&gt;&lt;P&gt;I'm trying with all possible settings, but could be better to know it.&lt;/P&gt;&lt;P&gt;my signal are:&lt;/P&gt;&lt;P&gt;Vsync active high (mens during high period of Vsync i have valid lines)&lt;/P&gt;&lt;P&gt;Hsync active high(during high period of Hsync I have valid data)&lt;/P&gt;&lt;P&gt;Pclk active high (data valid on rising edge)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Data_en is used in parallel CSI?or not?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Sep 2014 13:06:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371854#M53110</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-19T13:06:35Z</dc:date>
    </item>
    <item>
      <title>Re: Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371855#M53111</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;this is my patch file adapted to the boundary kernel 3.10.17.1.0.1_ga kernel tree to use both parallel, but still have problem.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Sep 2014 13:20:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371855#M53111</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-19T13:20:23Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371856#M53112</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;just adding some log that shows the error i have back:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;clock_curr=mclk=27000000&lt;/P&gt;&lt;P&gt;ipu_csi_window_size_crop: Error left=0 top=59455247&lt;/P&gt;&lt;P&gt;ipu_csi_window_size_crop: dopo Error left=280 top=1e0&lt;/P&gt;&lt;P&gt;power_up_camera: ipu1/csi1&lt;/P&gt;&lt;P&gt;ioctl_init&lt;/P&gt;&lt;P&gt;Setting mclk to 27 MHz&lt;/P&gt;&lt;P&gt;AR0134_init&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;clock_curr=mclk=27000000&lt;/P&gt;&lt;P&gt;ipu_csi_window_size_crop: Error left=0 top=59455247&lt;/P&gt;&lt;P&gt;ipu_csi_window_size_crop: dopo Error left=280 top=1e0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0&lt;/P&gt;&lt;P&gt;power_down_callback: ipu1/csi1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i will enable more pr_debug to have a more verbose log.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Sep 2014 13:57:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371856#M53112</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-19T13:57:45Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371857#M53113</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Something more about my test:&lt;/P&gt;&lt;P&gt;- Ican say DATA_EN is used also in parallel port so is missing a parameters to configure data_en polarity from the sensor driver such as vert and horiz sync :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;p-&amp;gt;u.bt656.nobt_vs_inv = 1;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;p-&amp;gt;u.bt656.nobt_hs_inv = 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;so maybe we need to add a&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;p-&amp;gt;u.bt656.nobt_dataen_inv = 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;now i need to understand how to configure the sensor port on how to capture a grey scale sensor :YYYYYYYYYYYYYYYYYY&lt;/P&gt;&lt;P&gt;V4L2_PIX_FMT_GREY is not handled by ipu_capture.c&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now i don't see the timeout error anymore, even if the image captured is not correct yet... but the sensor port seems to acquire something&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Sep 2014 13:21:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371857#M53113</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-22T13:21:38Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371858#M53114</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;so I added the support for IPU_PIX_FMT_GREY (in the generic)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ipu_csi_init_interface(struct ipu_soc *ipu, uint16_t width, uint16_t height,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t pixel_fmt, ipu_csi_signal_cfg_t cfg_param)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t data = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t csi = cfg_param.csi;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set SENS_DATA_FORMAT bits (8, 9 and 10)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RGB or YUV444 is 0 which is current value in data so not set&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; explicitly&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This is also the default value if attempts are made to set it to&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; something invalid. */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; switch (pixel_fmt) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_YUYV:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_UYVY:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_RGB24:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_BGR24:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB_YUV444;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_GENERIC:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_GENERIC_16:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_GREY:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_RGB565:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; case IPU_PIX_FMT_RGB555:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB555;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; default:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dev_dbg(ipu-&amp;gt;dev, "%s:pixel_fmt=%x\n", __func__, pixel_fmt);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return -EINVAL;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;/* to patch my personal HW */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;if(csi==1)&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cfg_param.data_en_pol=1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but we nned to add a new field. to support the dinamic configuration of data_en polarity from DTS &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Sep 2014 15:54:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371858#M53114</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-22T15:54:11Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371859#M53115</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;this seems to be the solution for the raw acquisition:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/327070"&gt;imx6 support for 8-bit RAW camera&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Sep 2014 14:50:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371859#M53115</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-23T14:50:14Z</dc:date>
    </item>
    <item>
      <title>Re: Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371860#M53116</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;the solution is still not working....&lt;/P&gt;&lt;P&gt;still I have a strange image captured.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this is the pipe i'm using:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;gst-launch mfw_v4lsrc num-buffers=1 device=/dev/video3 ! filesink location=/mnt/nfs/home/sample.raw&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the sensor is a 1280x960 greyscale so the capture should be 1228800 bytes.&lt;/P&gt;&lt;P&gt;the raw i have is 1800000 bytes it seems to be as a 4:2:0....&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;take a look at it, using gimp opening it as raw 1280x960.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Sep 2014 13:16:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371860#M53116</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-25T13:16:31Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371861#M53117</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i think i found the problem: (referring to 3.10.17_1.0.1_ga)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; v2f.fmt.pix.pixelformat is set to &lt;/P&gt;&lt;P&gt; cam-&amp;gt;v2f.fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; in the init_cam_struct function , and it is never updatewhit the value specified in the driver .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; ar0134_data.pix.pixelformat = V4L2_PIX_FMT_GREY;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; I added everywhere in the "if" or "case" my mew case (idenntical to V4L2_PIX_FMT_GENERIC)&lt;/P&gt;&lt;P&gt; but it is not updated anywhere the cam-&amp;gt;v2f.fmt.pix.pixelformat so it is alwasy V4L2_PIX_FMT_YUV420 and it does a big messy...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Sep 2014 14:58:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371861#M53117</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-26T14:58:21Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371862#M53118</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm really diggin iside CSI-IPU- chain.&lt;/P&gt;&lt;P&gt; I can say that there are some missing control and "case"... Mainly it works if the sensor come in as YUV422 and the output from the ipu is YUV420....&lt;/P&gt;&lt;P&gt; any other case (Bayer ...&amp;nbsp; grey scale... )&amp;nbsp; are not considered so they are not working proprely.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So i think the CSI ---&amp;gt; IPU ---&amp;gt; chain enned a "serious" patch to include the missing cases.... I think the most common cases could be sensor with Bayer output and greyscale output.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 10:19:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371862#M53118</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-30T10:19:06Z</dc:date>
    </item>
    <item>
      <title>Re: Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371863#M53119</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Important FIX:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in file ipu_still.c&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static int prp_still_start(void *private)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; cam_data *cam = (cam_data *) private;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; u32 pixel_fmt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; int err;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_channel_params_t params;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s:ipu_channel_request still %d %d \n", __func__,cam-&amp;gt;ipu_id,cam-&amp;gt;csi);&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_YUV420P;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_NV12)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_NV12;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_YUV422P;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_UYVY)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_UYVY;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUYV)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_YUYV;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR24)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_BGR24;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_RGB24;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_RGB565;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR32)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_BGR32;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if (cam-&amp;gt;v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB32)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt = IPU_PIX_FMT_RGB32;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(KERN_ERR "format not supported\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return -EINVAL;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; memset(&amp;amp;params, 0, sizeof(params));&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;STRONG&gt;params.csi_mem.csi = cam-&amp;gt;csi;&amp;nbsp; // OMAR : otherwise the CSI number is missing from here and forever&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; err = ipu_channel_request(cam-&amp;gt;ipu, CSI_MEM, &amp;amp;params, &amp;amp;cam-&amp;gt;ipu_chan);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (err) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s:ipu_channel_request %d\n", __func__, err);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; err = ipu_init_channel_buffer(cam-&amp;gt;ipu, CSI_MEM, IPU_OUTPUT_BUFFER,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pixel_fmt, cam-&amp;gt;v2f.fmt.pix.width,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cam-&amp;gt;v2f.fmt.pix.height,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cam-&amp;gt;v2f.fmt.pix.width, IPU_ROTATE_NONE,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; cam-&amp;gt;still_buf[0], cam-&amp;gt;still_buf[1], 0,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0, 0);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (err != 0)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#ifdef CONFIG_MXC_IPU_V1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_clear_irq(IPU_IRQ_SENSOR_OUT_EOF);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; err = ipu_request_irq(IPU_IRQ_SENSOR_OUT_EOF, prp_still_callback,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0, "Mxc Camera", cam);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (err != 0) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(KERN_ERR "Error registering irq.\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; callback_flag = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; callback_eof_flag = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_clear_irq(IPU_IRQ_SENSOR_EOF);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; err = ipu_request_irq(IPU_IRQ_SENSOR_EOF, prp_csi_eof_callback,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0, "Mxc Camera", cam);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (err != 0) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(KERN_ERR "Error IPU_IRQ_SENSOR_EOF\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;#else&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; callback_eof_flag = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; buffer_num = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_clear_irq(cam-&amp;gt;ipu, IPU_IRQ_CSI0_OUT_EOF);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; err = ipu_request_irq(cam-&amp;gt;ipu, IPU_IRQ_CSI0_OUT_EOF,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; prp_still_callback,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0, "Mxc Camera", cam);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (err != 0) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printk(KERN_ERR "Error registering irq.\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_select_buffer(cam-&amp;gt;ipu, CSI_MEM, IPU_OUTPUT_BUFFER, 0);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ipu_enable_channel(cam-&amp;gt;ipu, CSI_MEM);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; cam_ipu_enable_csi(cam);&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; return err;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 10:50:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371863#M53119</guid>
      <dc:creator>Selea</dc:creator>
      <dc:date>2014-09-30T10:50:32Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371864#M53120</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Any updates?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm currently viewing similar troubles trying to enable IPU2 CSI1 interface&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/B&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Jan 2015 16:15:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371864#M53120</guid>
      <dc:creator>bobosv</dc:creator>
      <dc:date>2015-01-12T16:15:55Z</dc:date>
    </item>
    <item>
      <title>Re: IPU2 parallel port on IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371865#M53121</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Found it, The IOMUX_GPR1 register bit 19-20 needed to be set to select Paralell CSI interface!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/B&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Jan 2015 11:23:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IPU2-parallel-port-on-IMX6Q/m-p/371865#M53121</guid>
      <dc:creator>bobosv</dc:creator>
      <dc:date>2015-01-13T11:23:20Z</dc:date>
    </item>
  </channel>
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