<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Fail to boot from NAND flash</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369678#M52740</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI peterchan:&lt;/P&gt;&lt;P&gt;my board is mx6q_sabrelit ; uboot is 2013.04;so I &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;reference&lt;/SPAN&gt; you provide the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; &lt;/SPAN&gt;&lt;SPAN style="font-size: 12px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3778c7; background-color: #fdfdfd;"&gt;mx6qsabreauto.c&lt;/SPAN&gt;, I added "setup_gpmi_nand(void)" at mx6qsabrelit.c,This function gated off ENFC_CLK_ROOT clock first ,then config gpmi and bch clock,and enable ENFC_CLK_ROOT clock,This function same as you above.&lt;/P&gt;&lt;P&gt;my uboot boot form SPI flash;This my uboot print info:&lt;/P&gt;&lt;P&gt;U-Boot 2013.04 (Jan 12 2015 - 18:51:10)&lt;/P&gt;&lt;P&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;&lt;P&gt;CPU:&amp;nbsp;&amp;nbsp; Temperature 32 C, calibration data: 0x55a4ae7d&lt;/P&gt;&lt;P&gt;Reset cause: POR&lt;/P&gt;&lt;P&gt;Board: MX6Q-Sabre Lite&lt;/P&gt;&lt;P&gt;I2C:&amp;nbsp;&amp;nbsp; ready&lt;/P&gt;&lt;P&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;&lt;P&gt;NAND:&amp;nbsp; 256 MiB&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //my uboot can recognized Nand flash well.and parameters are correct!&lt;/P&gt;&lt;P&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0, FSL_SDHC: 1&lt;/P&gt;&lt;P&gt;SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB&lt;/P&gt;&lt;P&gt;No panel detected: default to HDMI&lt;/P&gt;&lt;P&gt;unsupported panel HDMI&lt;/P&gt;&lt;P&gt;In:&amp;nbsp;&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Out:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Err:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Net:&amp;nbsp;&amp;nbsp; using phy at 7&lt;/P&gt;&lt;P&gt;FEC [PRIME]&lt;/P&gt;&lt;P&gt;Normal Boot&lt;/P&gt;&lt;P&gt;Hit any key to stop autoboot:&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;MX6QSABRELITE U-Boot &amp;gt; nand info&lt;/P&gt;&lt;P&gt;Device 0: nand0, sector size 128 KiB&amp;nbsp; //my nand parameters&lt;/P&gt;&lt;P&gt;&amp;nbsp; Page size&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2048 b&lt;/P&gt;&lt;P&gt;&amp;nbsp; OOB size&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 64 b&lt;/P&gt;&lt;P&gt;&amp;nbsp; Erase size&amp;nbsp;&amp;nbsp; 131072 b&lt;/P&gt;&lt;P&gt;MX6QSABRELITE U-Boot &amp;gt; nand erase 0 400&lt;/P&gt;&lt;P&gt;NAND erase: device 0 offset 0x0, size 0x400&lt;/P&gt;&lt;P&gt;MXS NAND: DMA read error&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //the DMA error&lt;/P&gt;&lt;P&gt;MXS NAND: Error sending command&lt;/P&gt;&lt;P&gt;MXS NAND: Error sending command&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1."The silicon rev 1.3 " is the mx6q or uboot ? I'm sorry to understant it,can you give me the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;errata document&lt;/SPAN&gt;? I don't know where download it.&lt;/P&gt;&lt;P&gt;2.I need to set the timing? I used the default timing at the uboot.and I used the Asynchronous.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 12 Jan 2015 11:12:59 GMT</pubDate>
    <dc:creator>乐乐季</dc:creator>
    <dc:date>2015-01-12T11:12:59Z</dc:date>
    <item>
      <title>Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369672#M52734</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Hi All,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Our product with i.MX6q system sometimes fail to boot from NAND flash.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;I found a similar case(ERR007117) with this error in IMX6DQ errata document.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Is it a same situation with case ERR007117?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; color: #000000; font-size: 10pt;"&gt;Debug log is as below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;U-Boot 2009.08-dirty ( 7月 02 2014 - 11:48:24)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CPU: Freescale i.MX6 family TO1.2 at 792 MHz&lt;/P&gt;&lt;P&gt;Thermal sensor with ratio = 186&lt;/P&gt;&lt;P&gt;Temperature:&amp;nbsp;&amp;nbsp; 23 C, calibration data 0x5984fd69&lt;/P&gt;&lt;P&gt;mx6q pll1: 792MHz&lt;/P&gt;&lt;P&gt;mx6q pll2: 528MHz&lt;/P&gt;&lt;P&gt;mx6q pll3: 480MHz&lt;/P&gt;&lt;P&gt;mx6q pll8: 50MHz&lt;/P&gt;&lt;P&gt;ipg clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 66000000Hz&lt;/P&gt;&lt;P&gt;ipg per clock : 66000000Hz&lt;/P&gt;&lt;P&gt;uart clock&amp;nbsp;&amp;nbsp;&amp;nbsp; : 80000000Hz&lt;/P&gt;&lt;P&gt;cspi clock&amp;nbsp;&amp;nbsp;&amp;nbsp; : 60000000Hz&lt;/P&gt;&lt;P&gt;ahb clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 132000000Hz&lt;/P&gt;&lt;P&gt;axi clock&amp;nbsp;&amp;nbsp; : 264000000Hz&lt;/P&gt;&lt;P&gt;emi_slow clock: 29333333Hz&lt;/P&gt;&lt;P&gt;ddr clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 528000000Hz&lt;/P&gt;&lt;P&gt;usdhc1 clock&amp;nbsp; : 198000000Hz&lt;/P&gt;&lt;P&gt;usdhc2 clock&amp;nbsp; : 198000000Hz&lt;/P&gt;&lt;P&gt;usdhc3 clock&amp;nbsp; : 198000000Hz&lt;/P&gt;&lt;P&gt;usdhc4 clock&amp;nbsp; : 198000000Hz&lt;/P&gt;&lt;P&gt;nfc clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 11000000Hz&lt;/P&gt;&lt;P&gt;Board: i.MX6Q-PCP-A301: unknown-board Board: 0x63012 [POR ]&lt;/P&gt;&lt;P&gt;Boot Device: NAND&lt;/P&gt;&lt;P&gt;I2C:&amp;nbsp;&amp;nbsp; ready&lt;/P&gt;&lt;P&gt;DRAM:&amp;nbsp;&amp;nbsp; 1 GB&lt;/P&gt;&lt;P&gt;NAND:&amp;nbsp; gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;gpmi_reset_block(00112000): module reset timeout&lt;/P&gt;&lt;P&gt;[send_command] DMA error&lt;/P&gt;&lt;P&gt;Command execute failed!&lt;/P&gt;&lt;P&gt;[send_command] DMA error&lt;/P&gt;&lt;P&gt;Command execute failed!&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[send_command] DMA error&lt;/P&gt;&lt;P&gt;Command execute failed!&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[send_command] DMA error&lt;/P&gt;&lt;P&gt;Command execute failed!&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[send_command] DMA error&lt;/P&gt;&lt;P&gt;Command execute failed!&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;[read_data] DMA error&lt;/P&gt;&lt;P&gt;No NAND device found!!!&lt;/P&gt;&lt;P&gt;0 MiB&lt;/P&gt;&lt;P&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Sep 2014 05:56:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369672#M52734</guid>
      <dc:creator>wei-fonglin</dc:creator>
      <dc:date>2014-09-16T05:56:20Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369673#M52735</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, the error is caused by ENGR007117. You need i.MX6Q silicon rev 1.3 on your board and your u-boot need to follow the procedure in this errata to work around this issue. Example code can be found at &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13.3333339691162px;"&gt;setup_gpmi_nand() &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13.3333339691162px;"&gt;in Yocto L3.10.17 u-boot-imx/2013.04-r0/git/board/freescale/mx6qsabreauto/mx6qsabreauto.c (attached).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Sep 2014 07:35:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369673#M52735</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2014-09-16T07:35:47Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369674#M52736</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI peterchan;&lt;/P&gt;&lt;P&gt;1."&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;You need i.MX6Q silicon rev 1.3 on your board&lt;/SPAN&gt;" is what meaning?&lt;/P&gt;&lt;P&gt;2.my page size is 4096,the OBB is 224,is it true?&lt;/P&gt;&lt;P&gt;3.mu uboot2013 can Operate Nand register,so it can recognize the nand ,but the uboot can't read/write the memory.&lt;/P&gt;&lt;P&gt;&amp;nbsp; It display :&lt;/P&gt;&lt;P&gt; MXS NAND: DMA read error&lt;/P&gt;&lt;P&gt; MXS NAND: Error sending command&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 10 Jan 2015 10:16:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369674#M52736</guid>
      <dc:creator>乐乐季</dc:creator>
      <dc:date>2015-01-10T10:16:23Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369675#M52737</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1. Yes, you need i.MX6Q silicon rev 1.3 for NAND boot. All code that switch switching enfc_clk_root also needs to follow the procedure in errata.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2,3. The errata ENGR007117 does not related to NAND layout. The problem is the enfc_clk_root clock is not gated off before switching its clock source. The clock glitches might be passed to the dividers that follow and will affect the GPMI and BCH. Please double check your u-boot to ensure it is following the errata to switch enfc_clk_root.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Jan 2015 01:14:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369675#M52737</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2015-01-12T01:14:43Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369676#M52738</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI peterchan:&lt;/P&gt;&lt;P&gt;1.I'm sorry to understand the "silicon",please explain again.&lt;/P&gt;&lt;P&gt;2.I reference you provide &lt;SPAN style="color: #3778c7; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12px; background-color: #fdfdfd;"&gt;mx6qsabreauto.c, I operated the command in uboot:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QSABRELITE U-Boot &amp;gt; nand read 10800000 10000000 400000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NAND read: device 0 offset 0x10000000, size 0x400000&lt;/P&gt;&lt;P&gt;but prompt:&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;MXS NAND: DMA read error&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;MXS NAND: Error sending command&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;3.&amp;nbsp; it doesn't matter with OOB size?&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;please! thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Jan 2015 01:45:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369676#M52738</guid>
      <dc:creator>乐乐季</dc:creator>
      <dc:date>2015-01-12T01:45:44Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369677#M52739</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The errata ENGR007117 describe a NAND boot problem caused by the enfc_clk_root clock is not gated off when doing clock source switching. The function blocks GPMI and IOMUX relies on the enfc_clk_root clock as its input. When power up, ROM code switches the enfc_clk_root clock source without gated off the clock to these blocks. clock glitches might be passed to the divider that follows the clock mux, and the divider might behave unpredictably. This can cause the clock generation to fail and the chip will not boot successfully. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The software workaround is to gate off the GPMI and IOMUX blocks before switching the enfc_clk_root clock source, and gate on these blocks again after switching complete. Silicon rev 1.3 has included this workaround to fix the problem in ROM code. &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;So you need both silicon rev 1.3 and follow the ENGR007117 workaround in u-boot and kernel. Please refer to the chip errata document for more detail information.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Are you testing on silicon rev 1.3? Do you boot the i.MX6 chip from raw NAND? Or boot from other device and test the u-boot NAND commands? Can u-boot identify this NAND part?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Jan 2015 09:33:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369677#M52739</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2015-01-12T09:33:17Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369678#M52740</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI peterchan:&lt;/P&gt;&lt;P&gt;my board is mx6q_sabrelit ; uboot is 2013.04;so I &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;reference&lt;/SPAN&gt; you provide the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; &lt;/SPAN&gt;&lt;SPAN style="font-size: 12px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3778c7; background-color: #fdfdfd;"&gt;mx6qsabreauto.c&lt;/SPAN&gt;, I added "setup_gpmi_nand(void)" at mx6qsabrelit.c,This function gated off ENFC_CLK_ROOT clock first ,then config gpmi and bch clock,and enable ENFC_CLK_ROOT clock,This function same as you above.&lt;/P&gt;&lt;P&gt;my uboot boot form SPI flash;This my uboot print info:&lt;/P&gt;&lt;P&gt;U-Boot 2013.04 (Jan 12 2015 - 18:51:10)&lt;/P&gt;&lt;P&gt;CPU:&amp;nbsp;&amp;nbsp; Freescale i.MX6Q rev1.2 at 792 MHz&lt;/P&gt;&lt;P&gt;CPU:&amp;nbsp;&amp;nbsp; Temperature 32 C, calibration data: 0x55a4ae7d&lt;/P&gt;&lt;P&gt;Reset cause: POR&lt;/P&gt;&lt;P&gt;Board: MX6Q-Sabre Lite&lt;/P&gt;&lt;P&gt;I2C:&amp;nbsp;&amp;nbsp; ready&lt;/P&gt;&lt;P&gt;DRAM:&amp;nbsp; 1 GiB&lt;/P&gt;&lt;P&gt;NAND:&amp;nbsp; 256 MiB&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //my uboot can recognized Nand flash well.and parameters are correct!&lt;/P&gt;&lt;P&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0, FSL_SDHC: 1&lt;/P&gt;&lt;P&gt;SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB&lt;/P&gt;&lt;P&gt;No panel detected: default to HDMI&lt;/P&gt;&lt;P&gt;unsupported panel HDMI&lt;/P&gt;&lt;P&gt;In:&amp;nbsp;&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Out:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Err:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Net:&amp;nbsp;&amp;nbsp; using phy at 7&lt;/P&gt;&lt;P&gt;FEC [PRIME]&lt;/P&gt;&lt;P&gt;Normal Boot&lt;/P&gt;&lt;P&gt;Hit any key to stop autoboot:&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;MX6QSABRELITE U-Boot &amp;gt; nand info&lt;/P&gt;&lt;P&gt;Device 0: nand0, sector size 128 KiB&amp;nbsp; //my nand parameters&lt;/P&gt;&lt;P&gt;&amp;nbsp; Page size&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2048 b&lt;/P&gt;&lt;P&gt;&amp;nbsp; OOB size&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 64 b&lt;/P&gt;&lt;P&gt;&amp;nbsp; Erase size&amp;nbsp;&amp;nbsp; 131072 b&lt;/P&gt;&lt;P&gt;MX6QSABRELITE U-Boot &amp;gt; nand erase 0 400&lt;/P&gt;&lt;P&gt;NAND erase: device 0 offset 0x0, size 0x400&lt;/P&gt;&lt;P&gt;MXS NAND: DMA read error&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //the DMA error&lt;/P&gt;&lt;P&gt;MXS NAND: Error sending command&lt;/P&gt;&lt;P&gt;MXS NAND: Error sending command&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1."The silicon rev 1.3 " is the mx6q or uboot ? I'm sorry to understant it,can you give me the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;errata document&lt;/SPAN&gt;? I don't know where download it.&lt;/P&gt;&lt;P&gt;2.I need to set the timing? I used the default timing at the uboot.and I used the Asynchronous.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Jan 2015 11:12:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369678#M52740</guid>
      <dc:creator>乐乐季</dc:creator>
      <dc:date>2015-01-12T11:12:59Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369679#M52741</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can download the i.MX6DQ errata at &lt;A class="loading" href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&amp;amp;fpsp=1&amp;amp;tab=Documentation_Tab" title="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&amp;amp;fpsp=1&amp;amp;tab=Documentation_Tab"&gt;http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&amp;amp;fpsp=1&amp;amp;tab=Documentation_Tab&lt;/A&gt;. You need i.MX6Q rev 1.3 when the boot device is NAND flash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The MXS-NAND driver in u-boot 2013.04 does not update the GPMI_TIMINGx registers. These register values are either passed from the Firmware Configuration Block when boot mode is NAND or the reset values for other boot modes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since i.MX6Q is not boot from NAND and the u-boot can detect the NAND device, it does not seem your device is affected by ERR007117.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jan 2015 06:29:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369679#M52741</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2015-01-14T06:29:21Z</dc:date>
    </item>
    <item>
      <title>Re: Fail to boot from NAND flash</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369680#M52742</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi PeterChan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for pointing out the solution., &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BTW can you locate me the kernel fix for the same (for ERR007117)&lt;/P&gt;&lt;P&gt;and which branch contains the fix.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If possible, share the code as well.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Mar 2015 14:15:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Fail-to-boot-from-NAND-flash/m-p/369680#M52742</guid>
      <dc:creator>madhutux</dc:creator>
      <dc:date>2015-03-10T14:15:44Z</dc:date>
    </item>
  </channel>
</rss>

