<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Controlling the Write Address When Writing Image to External Memory in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Controlling-the-Write-Address-When-Writing-Image-to-External/m-p/367043#M52205</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have questions about controlling the address of i.MX6 dual lite (the one with EPDC controller in it) when writing an image of 1600x2400 to external memory. Which module is in charge of generating the write image address? SDMA or MMDC? Can either of this module generate 2D address which line offset exists between image lines?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 22 Jan 2015 02:11:54 GMT</pubDate>
    <dc:creator>samxiao</dc:creator>
    <dc:date>2015-01-22T02:11:54Z</dc:date>
    <item>
      <title>Controlling the Write Address When Writing Image to External Memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Controlling-the-Write-Address-When-Writing-Image-to-External/m-p/367043#M52205</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have questions about controlling the address of i.MX6 dual lite (the one with EPDC controller in it) when writing an image of 1600x2400 to external memory. Which module is in charge of generating the write image address? SDMA or MMDC? Can either of this module generate 2D address which line offset exists between image lines?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Jan 2015 02:11:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Controlling-the-Write-Address-When-Writing-Image-to-External/m-p/367043#M52205</guid>
      <dc:creator>samxiao</dc:creator>
      <dc:date>2015-01-22T02:11:54Z</dc:date>
    </item>
    <item>
      <title>Re: Controlling the Write Address When Writing Image to External Memory</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Controlling-the-Write-Address-When-Writing-Image-to-External/m-p/367044#M52206</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sam&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;PXP module has own dma engine and it provides data processing&lt;/P&gt;&lt;P&gt;for EPDC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Jan 2015 07:04:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Controlling-the-Write-Address-When-Writing-Image-to-External/m-p/367044#M52206</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-01-22T07:04:35Z</dc:date>
    </item>
  </channel>
</rss>

