topic DDR2 Differential vs Single-Ended... in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/DDR2-Differential-vs-Single-Ended/m-p/169124#M5172 <HTML><HEAD></HEAD><BODY><DIV><P>We have been running into intermittent freezing/rebooting issues on some of our beta systems. &nbsp;Implementation of the PLL patch has resolved a couple and dramatically improved others. &nbsp;However an issue remains. &nbsp;From the prevailing evidence it is most DDR related.</P><P>&nbsp;</P><P>Apparently many are having better luck with single-ended operation.</P><P>&nbsp;</P><P>How many of you are operating cleanly in Differential mode and how many in Single-ended mode?</P><P>This unofficial survey should help us all determine best memory architecture.</P><P>&nbsp;</P><P>Our platform is heavily based on the MX51EVK (running Android R9.2) using Micron DDR2 memory (identical or better to the Elpida on the EVK). &nbsp;If anyone has seen improved operation in single-ended mode and would care to share the modified "flash_header.S" file that would be most appreciated.</P><P>&nbsp;</P><P>Thanks All!</P><P>&nbsp;</P><P>(this discussion is mirrored in the MX51EVK Group to access the largest target audience)</P></DIV></BODY></HTML> Fri, 09 Sep 2011 17:23:30 GMT mbp 2011-09-09T17:23:30Z DDR2 Differential vs Single-Ended... https://community.nxp.com/t5/i-MX-Processors/DDR2-Differential-vs-Single-Ended/m-p/169124#M5172 <HTML><HEAD></HEAD><BODY><DIV><P>We have been running into intermittent freezing/rebooting issues on some of our beta systems. &nbsp;Implementation of the PLL patch has resolved a couple and dramatically improved others. &nbsp;However an issue remains. &nbsp;From the prevailing evidence it is most DDR related.</P><P>&nbsp;</P><P>Apparently many are having better luck with single-ended operation.</P><P>&nbsp;</P><P>How many of you are operating cleanly in Differential mode and how many in Single-ended mode?</P><P>This unofficial survey should help us all determine best memory architecture.</P><P>&nbsp;</P><P>Our platform is heavily based on the MX51EVK (running Android R9.2) using Micron DDR2 memory (identical or better to the Elpida on the EVK). &nbsp;If anyone has seen improved operation in single-ended mode and would care to share the modified "flash_header.S" file that would be most appreciated.</P><P>&nbsp;</P><P>Thanks All!</P><P>&nbsp;</P><P>(this discussion is mirrored in the MX51EVK Group to access the largest target audience)</P></DIV></BODY></HTML> Fri, 09 Sep 2011 17:23:30 GMT https://community.nxp.com/t5/i-MX-Processors/DDR2-Differential-vs-Single-Ended/m-p/169124#M5172 mbp 2011-09-09T17:23:30Z