<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: LVDS and PWM settings on iMX6 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364400#M51571</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If we assume that the device tree settings is correctly written and we have the following codes below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Kernel Boot parameter:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=ldb,LDB-WSVGA,if=RGB24 ldb=sin0 fbmem=128M&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;LVDS GPR iomux setting in board file:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;static void __init imx6q_ipad2_ldb_mux_init(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /*&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * MX6Q SabreSD board base:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * DI0 enabled, 24bit width, vsync active low&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; struct regmap *gpr;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (!IS_ERR(gpr)) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (of_machine_is_compatible("fsl,imx6q-ipad2")){&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0x0F, 0x01);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0xF0, 0x0A);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0xF00, 0x06);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; else {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s(): failed to find fsl,imx6q-ipad2 regmap\n", __func__);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; } else {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s(): failed to find fsl,imx6q-iomux-gpr regmap\n",&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __func__);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are we still missing anything to set LVDS and the graphics driver?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 24 Jan 2015 08:40:53 GMT</pubDate>
    <dc:creator>yurirellosa</dc:creator>
    <dc:date>2015-01-24T08:40:53Z</dc:date>
    <item>
      <title>LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364396#M51567</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are having issues with display and backlight.&lt;/P&gt;&lt;P&gt;The fb driver seems run but the penguin logo does not show and the backlight driver doesn't seem to be even called.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below are the related device tree parts. Is there something wrong with these settings?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;mxcfb1: fb@0 {&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; compatible = "fsl,mxc_sdc_fb";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; disp_dev = "ldb";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; interface_pix_fmt = "RGB24";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; mode_str ="LDB-WSVGA";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; default_bpp = &amp;lt;16&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; int_clk = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; late_init = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;};&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&amp;amp;ldb {&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; ipu_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; disp_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; ext_ref = &amp;lt;1&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; mode = "sin0";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; sec_ipu_id = &amp;lt;1&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; sec_disp_id = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;};&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;backlight {&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; compatible = "pwm-backlight";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; pwms = &amp;lt;&amp;amp;pwm1 0 10000000&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; brightness-levels = &amp;lt;0 4 8 16 32 64 128 248&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; default-brightness-level = &amp;lt;7&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;};&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&amp;amp;pwm1 {&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pwm1_1&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;};&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also I noticed with the the reference manual for i.MX 6Dual/6Quad on page 213, IPU-1 &amp;amp; IPU-2 have [0260_0000] and [02A0_0000] addresses respectively.&lt;/P&gt;&lt;P&gt;But on imx6qdl.dtsi it is like so:&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;ipu1: ipu@02400000 {&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; compatible = "fsl,imx6q-ipu";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; reg = &amp;lt;0x02400000 0x400000&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; interrupts = &amp;lt;0 6 0x4 0 5 0x4&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; clocks = &amp;lt;&amp;amp;clks 130&amp;gt;, &amp;lt;&amp;amp;clks 131&amp;gt;, &amp;lt;&amp;amp;clks 132&amp;gt;,&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; &amp;lt;&amp;amp;clks 39&amp;gt;, &amp;lt;&amp;amp;clks 40&amp;gt;,&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; &amp;lt;&amp;amp;clks 135&amp;gt;, &amp;lt;&amp;amp;clks 136&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; clock-names = "bus", "di0", "di1",&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "di0_sel", "di1_sel",&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "ldb_di0", "ldb_di1";&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; resets = &amp;lt;&amp;amp;src 2&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&amp;nbsp; bypass_reset = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;};&lt;/P&gt;&lt;P&gt;The register address is at [0240_0000] should this be corrected to [0260_0000]?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Jan 2015 15:23:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364396#M51567</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-01-21T15:23:05Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364397#M51568</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It seems for backlight to work, I needed the CONFIG_PWM_IMX on defconfig.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Anyone have a clue what's wrong with LDB / LVDS0?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Jan 2015 08:17:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364397#M51568</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-01-22T08:17:13Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364398#M51569</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which BSP or kernel version are you using? Is this problem shown in one of the FSL boards or you are working with a custom one?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Jan 2015 21:30:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364398#M51569</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2015-01-22T21:30:34Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364399#M51570</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Alejandro&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry I forgot to put in those information.&lt;/P&gt;&lt;P&gt;I am working on a custom board based on imx6q-sabresd. &lt;/P&gt;&lt;P&gt;The versions Yocto1.7.1, Linux branch &lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/log/?h=imx_3.10.17_1.0.0_ga" style="color: black; font-family: sans-serif; font-size: 13.3333330154419px;"&gt;imx_3.10.17_1.0.0_ga&lt;/A&gt;, u-boot-flsc 2014.10&lt;/P&gt;&lt;P&gt;The LCD display is connected to LVDS0 and that should be getting data from IPU1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Jan 2015 00:40:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364399#M51570</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-01-23T00:40:16Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364400#M51571</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If we assume that the device tree settings is correctly written and we have the following codes below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Kernel Boot parameter:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=ldb,LDB-WSVGA,if=RGB24 ldb=sin0 fbmem=128M&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;LVDS GPR iomux setting in board file:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;static void __init imx6q_ipad2_ldb_mux_init(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /*&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * MX6Q SabreSD board base:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * DI0 enabled, 24bit width, vsync active low&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; struct regmap *gpr;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (!IS_ERR(gpr)) {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (of_machine_is_compatible("fsl,imx6q-ipad2")){&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0x0F, 0x01);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0xF0, 0x0A);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; regmap_update_bits(gpr, IOMUXC_GPR2, 0xF00, 0x06);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; else {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s(): failed to find fsl,imx6q-ipad2 regmap\n", __func__);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; } else {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pr_err("%s(): failed to find fsl,imx6q-iomux-gpr regmap\n",&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __func__);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are we still missing anything to set LVDS and the graphics driver?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 24 Jan 2015 08:40:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364400#M51571</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-01-24T08:40:53Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364401#M51572</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We have made the display work by the following changes on the device tree&lt;/P&gt;&lt;P&gt;&amp;amp;cpu0 {&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pu-supply = &amp;lt;&amp;amp;reg_pu&amp;gt;; /* use pu_dummy if VDDSOC share with VDDPU */&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;};&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&amp;amp;gpc {&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pu-supply = &amp;lt;&amp;amp;reg_pu&amp;gt;; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;};&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&amp;amp;gpu {&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pu-supply = &amp;lt;&amp;amp;reg_pu&amp;gt;; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;};&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&amp;amp;vpu {&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pu-supply = &amp;lt;&amp;amp;reg_pu&amp;gt;; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;};&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;We got the idea from this thread --&amp;gt; &lt;A href="https://community.nxp.com/thread/328377"&gt;kernel hangs or fails to allocate CMA in galcore with i.MX Solo Sabre&lt;/A&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;From the sabresd reference device tree it was &amp;lt;&amp;amp;pu_dummy&amp;gt;. When we were setting this up I asked the hardware designer of the relation with &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;VDDSOC and VDDPU.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;He told me that VDDSOC generates VVDPU and are almost the same. So I interpreted this as VDDSOC "sharing with" VDDPU and retained the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;&amp;lt;&amp;amp;pu_dummy&amp;gt; settings.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Was it just my misunderstanding of the pu-supply comment? (&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px;"&gt;use pu_dummy if VDDSOC share with VDDPU&lt;/SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;It maybe working now but we would like to make sure if these are the right settings.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Any advice would be really helpful.&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Best Regards&lt;/P&gt;&lt;P style="font-size: 13px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Jan 2015 07:29:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364401#M51572</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-01-28T07:29:40Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364402#M51573</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have the same problem.&lt;/P&gt;&lt;P&gt;Forgive me, but I don't quite understand, did you change "reg_pu-&amp;gt;pu_dummy" or vice versa?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Ivan.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Jun 2015 14:28:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364402#M51573</guid>
      <dc:creator>ivannikolaenko</dc:creator>
      <dc:date>2015-06-24T14:28:55Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364403#M51574</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Ivan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for the very late reply, but were you able to solve your problem?&lt;/P&gt;&lt;P&gt;As to your question we changed "pu_dummy" -&amp;gt; "reg_pu".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Yuri&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Aug 2015 00:14:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364403#M51574</guid>
      <dc:creator>yurirellosa</dc:creator>
      <dc:date>2015-08-20T00:14:52Z</dc:date>
    </item>
    <item>
      <title>Re: LVDS and PWM settings on iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364404#M51575</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Yuri.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You for your responce.&lt;/P&gt;&lt;P&gt;I have my LVDS working - that was hardware issue. &lt;/P&gt;&lt;P&gt;I didn't changed pu-supply at all&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Ivan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Aug 2015 12:20:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LVDS-and-PWM-settings-on-iMX6/m-p/364404#M51575</guid>
      <dc:creator>ivannikolaenko</dc:creator>
      <dc:date>2015-08-20T12:20:10Z</dc:date>
    </item>
  </channel>
</rss>

