enabling timer compare through kernel

hamidsani — Tue, 20 Jan 2015 10:52:38 GMT

Hello community,

I have been trying to enable the timer output compare pin (MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2) on the iMX6Q with no success. I haven't found any example that discusses how to properly do this. My understanding is that I need to enable the pin on the kernel and then I could set the OCR1, TCCR1, and TIMSK1 registers through Linux.

Here is what I have been doing:

edit the kernel/arch/arm/boot/dts/imx6q-udoo.dts (I have an UDOO board)

inset

&gptcomp {

pinctrl-names = "default"

pinctrl-0 = <&pinctrl_gptcomp>;

status = "okay";

};

and in &iomuxc I added:

pinctrl_gptcomp: gptcompgrp{

fsl,pins = <

MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 0x1b0b1

};

Sadly this doesn't work correctly and building the kernel fails. I know that part of what I am doing is right because I have successfully enabled the UART3, 5 and I2C1 pins using similar method.

Any help would be appreciated.

Thanks

Re: enabling timer compare through kernel

alejandrolozan1 — Wed, 21 Jan 2015 17:31:47 GMT

Hi,

Just to clarify, did you modify the BSP? did you add or modify a driver? just to let you know the GPT is used for the OS tick and you should be very careful if you are modifying this module.

If you add you above nodes, the does the dtc fail? or the Kernel fails to compile? If you want to generate an some kind of PWM signal I suggesto you to use the PWM module whose driver is already developed.

Regards,

Alejandro

i.MX ProcessorsのトピックRe: enabling timer compare through kernel

enabling timer compare through kernel

Re: enabling timer compare through kernel