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    <title>i.MX Processors中的主题 Re: I.MX6 Dual with 32 bit DDR3</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357250#M50058</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Lei&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is possible, porting recommendations one can find in&lt;/P&gt;&lt;P&gt;i.MX_6Dual6Quad_BSP_Porting_Guide.pdf&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.freescale.com/webapp/Download?colCode=L3.0.35_4.1.0_LINUX_DOCS&amp;amp;location=null&amp;amp;fasp=1&amp;amp;WT_TYPE=Supporting%20Information&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=gz&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.gz"&gt;L3.0.35_4.1.0_LINUX_DOCS&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 Sep 2014 23:49:59 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2014-09-30T23:49:59Z</dc:date>
    <item>
      <title>I.MX6 Dual with 32 bit DDR3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357249#M50057</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here i have a question about the DDR3 connection.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;we plan to use I.MX6 Dual in application, it has 64bit DDR3 interface, but we only want to use 32bit DDR3, cause we are afraid the PCB space is to tight for 4 DDR3.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in this condition, is it possible that just connect 2 DDR3 on MMDC, and leave other DDR signal floating?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;and is it easy to do the modification in Linux source code for 32bit DDR3 interface?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LEON&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 13:29:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357249#M50057</guid>
      <dc:creator>cocobat</dc:creator>
      <dc:date>2014-09-30T13:29:31Z</dc:date>
    </item>
    <item>
      <title>Re: I.MX6 Dual with 32 bit DDR3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357250#M50058</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Lei&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is possible, porting recommendations one can find in&lt;/P&gt;&lt;P&gt;i.MX_6Dual6Quad_BSP_Porting_Guide.pdf&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.freescale.com/webapp/Download?colCode=L3.0.35_4.1.0_LINUX_DOCS&amp;amp;location=null&amp;amp;fasp=1&amp;amp;WT_TYPE=Supporting%20Information&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=gz&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.gz"&gt;L3.0.35_4.1.0_LINUX_DOCS&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 23:49:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357250#M50058</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2014-09-30T23:49:59Z</dc:date>
    </item>
    <item>
      <title>Re: I.MX6 Dual with 32 bit DDR3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357251#M50059</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It's great, thanks for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LEON&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Oct 2014 02:00:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357251#M50059</guid>
      <dc:creator>cocobat</dc:creator>
      <dc:date>2014-10-03T02:00:48Z</dc:date>
    </item>
    <item>
      <title>Re: I.MX6 Dual with 32 bit DDR3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357252#M50060</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using Dual lite processor and due to PCB space constraints I am also about to use 32bit DDR interface instead of 64bit.&lt;/P&gt;&lt;P&gt;Is it ok leave to leave the unused pins(DRAM_SDCLK,DRAM_D, DRAM_DQM, DRAM_SDQS and nDRAM_SDQS)&amp;nbsp; floating?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Vivek&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Nov 2015 05:36:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/I-MX6-Dual-with-32-bit-DDR3/m-p/357252#M50060</guid>
      <dc:creator>vivekr</dc:creator>
      <dc:date>2015-11-19T05:36:37Z</dc:date>
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