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    <title>topic Re: Issue about DDR options in Aid in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-DDR-options-in-Aid/m-p/357045#M50012</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would suggest to look at presentation describing this terminology&lt;/P&gt;&lt;P&gt;AMF-SDS-T0170&amp;nbsp; &lt;A href="http://www.freescale.com/webapp/Download?colCode=DWF14_AMF_SDS_T0170" target="_new"&gt;DRAM Controller Optimization for i.MX Application Processors&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/overview.jsp?code=DWFREESCALE_OLL&amp;amp;event=DwF2014" title="http://www.freescale.com/webapp/sps/site/overview.jsp?code=DWFREESCALE_OLL&amp;amp;event=DwF2014"&gt;Freescale Technical Sessions Library|Freescale&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can ask help of local FAE for problems with access&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 02 Apr 2015 01:46:09 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-04-02T01:46:09Z</dc:date>
    <item>
      <title>Issue about DDR options in Aid</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-DDR-options-in-Aid/m-p/357044#M50011</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,all&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Lot of the terminology I cannot &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;seperate.Please help me.Following is :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1. how to judge the number of the DRAM in ddr?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2. in Aid, we can find the keyword "per CS", how to understand the CS? whether it means the DDR signal CS? And per DDR signal CS bit can contain 2 chip select. So in aid, whether per CS means the number of DDR signal CS bit or the number of the chips?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 3. how to understand the die? because in aid we can find the keyword "per die","single die", and how to know the number of the die in ddr?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 4. the relations or the differentials among the number of DRAM, Die, CS?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; and I'm so confused about these terminology when I fill the DDR aid.xls. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; help me,3q~&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 27 Mar 2015 08:30:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-DDR-options-in-Aid/m-p/357044#M50011</guid>
      <dc:creator>tony_l_cai</dc:creator>
      <dc:date>2015-03-27T08:30:15Z</dc:date>
    </item>
    <item>
      <title>Re: Issue about DDR options in Aid</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-about-DDR-options-in-Aid/m-p/357045#M50012</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi tony&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would suggest to look at presentation describing this terminology&lt;/P&gt;&lt;P&gt;AMF-SDS-T0170&amp;nbsp; &lt;A href="http://www.freescale.com/webapp/Download?colCode=DWF14_AMF_SDS_T0170" target="_new"&gt;DRAM Controller Optimization for i.MX Application Processors&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/overview.jsp?code=DWFREESCALE_OLL&amp;amp;event=DwF2014" title="http://www.freescale.com/webapp/sps/site/overview.jsp?code=DWFREESCALE_OLL&amp;amp;event=DwF2014"&gt;Freescale Technical Sessions Library|Freescale&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can ask help of local FAE for problems with access&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2015 01:46:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-about-DDR-options-in-Aid/m-p/357045#M50012</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-04-02T01:46:09Z</dc:date>
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