<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic ENDEVPLUGINDETECT bit in USB PHY in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ENDEVPLUGINDETECT-bit-in-USB-PHY/m-p/168165#M4970</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How is this bit supposed to be configured? Hardware appears to work the same way regardless of whether it is set to 1 or 0. The manual doesn't appear to be trustworthy.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 14 Jun 2012 09:39:01 GMT</pubDate>
    <dc:creator>FredrikMoller</dc:creator>
    <dc:date>2012-06-14T09:39:01Z</dc:date>
    <item>
      <title>ENDEVPLUGINDETECT bit in USB PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ENDEVPLUGINDETECT-bit-in-USB-PHY/m-p/168165#M4970</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How is this bit supposed to be configured? Hardware appears to work the same way regardless of whether it is set to 1 or 0. The manual doesn't appear to be trustworthy.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Jun 2012 09:39:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ENDEVPLUGINDETECT-bit-in-USB-PHY/m-p/168165#M4970</guid>
      <dc:creator>FredrikMoller</dc:creator>
      <dc:date>2012-06-14T09:39:01Z</dc:date>
    </item>
  </channel>
</rss>

