topic Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25 in i.MX Processors

Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Jim_Carlson — Wed, 24 Nov 2010 17:09:35 GMT

Hello,

My customer’s i.MX25 system has two 64MB SDRAM chips connected. Since each chip select maps a 256MB region, the two SDRAMS are noncontiguous (a 192MB gap between them). Can Linux be made to treat them as one 128MB RAM area or do we have to modify the ARM926’s MMU driver to remap them to a contiguous logical address space?

Regards,

Jim Carlson

Freescale FAE in Portland, Oregon

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

RobertSchwebel — Wed, 24 Nov 2010 17:55:58 GMT

Jim, Usually the bootloader manages the SDRAM banks and reports them to the kernel with the ATAG mechanism. For example, in barebox this looks like this (on MX31, but this is not different on MX25): http://git.pengutronix.de/?p=barebox.git;f=arch/arm/boards/pcm037/pcm037.c;hb=HEAD#l42 Robert

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Jim_Carlson — Wed, 24 Nov 2010 17:58:28 GMT

Thank you. I will check this out.

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Frias — Wed, 24 Nov 2010 20:56:38 GMT

You don't need to modify the Linux code, the only change needed is in u-Boot. - Add the second bank initialization DCD commands on: board/freescale/mx25_3stack/dcdheader.S - Change include/configs/mx25_3stack.h to add the second bank: #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_2 CSD1_BASE - Change dram_init function on board/freescale/mx25_3stack/mx25_3stack.c Hope this helps! Renato

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Jim_Carlson — Wed, 24 Nov 2010 20:58:11 GMT

Thank you!

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Jim_Carlson — Wed, 24 Nov 2010 22:47:43 GMT

Hi Renato, My customer doesn't think your suggestion is too useful. Not being a Linux expert, I can't really comment. Here are his comments: We are setting up both banks within the ATAGs we pass in from U-boot to the kernel, we just need someone to explain the various kernel memory configuration options for discontiguous memory like this, ie: CONFIG_DISCONTIGMEM_MANUALhttp://cateee.net/lkddb/web-lkddb/DISCONTIGMEM_MANUAL.html or the newer option CONFIG_SPARSEMEM We can enable these fairly easily, it is just unknown if 1. We need to and 2. What we gain/lose if we do. Can you comment on this? Thank you very much! -- Regards, Jim

Re: Contiguous Memory with Two 64MB SDRAM Chips on i.MX25

Frias — Tue, 30 Nov 2010 20:24:10 GMT

Jim, The first step, is mandatory: - Add the second bank initialization DCD commands on: board/freescale/mx25_3stack/dcdheader.S Otherwise the DDR controller will not init the second bank. I never tested the Linux CONFIG mentioned, can't comment on this... sorry.