<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Question, SPI flash memory addressing mode for i.MX28 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-SPI-flash-memory-addressing-mode-for-i-MX28/m-p/354000#M49397</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi AVNET JAPAN FAE&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i.MX28 supports only 3byte addressing as&lt;/P&gt;&lt;P&gt;described in sect.12.10 SPI Boot Mode &lt;A href="http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;MCIMX28RM&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;supports only 2-byte addresses for EEPROMs and 3-byte addresses for NORs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think you can consult with this flash vendor support if it supports also 3byte addressing mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 19 Jan 2015 01:23:40 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-01-19T01:23:40Z</dc:date>
    <item>
      <title>Question, SPI flash memory addressing mode for i.MX28</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-SPI-flash-memory-addressing-mode-for-i-MX28/m-p/353999#M49396</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the addressing of SPI flash memory used for i.MX28 boot device.&lt;/P&gt;&lt;P&gt;My customer plans to use SPI flash memory for boot storage of their i.MX28 board.&lt;/P&gt;&lt;P&gt;Is it possible to use 256Mbits SPI flash for that?&lt;/P&gt;&lt;P&gt;That is,&lt;/P&gt;&lt;P&gt;Is it possible to use SPI flash with its 4byte addressing mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 18 Jan 2015 18:50:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-SPI-flash-memory-addressing-mode-for-i-MX28/m-p/353999#M49396</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2015-01-18T18:50:21Z</dc:date>
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    <item>
      <title>Re: Question, SPI flash memory addressing mode for i.MX28</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-SPI-flash-memory-addressing-mode-for-i-MX28/m-p/354000#M49397</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi AVNET JAPAN FAE&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i.MX28 supports only 3byte addressing as&lt;/P&gt;&lt;P&gt;described in sect.12.10 SPI Boot Mode &lt;A href="http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;MCIMX28RM&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;supports only 2-byte addresses for EEPROMs and 3-byte addresses for NORs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think you can consult with this flash vendor support if it supports also 3byte addressing mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Jan 2015 01:23:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-SPI-flash-memory-addressing-mode-for-i-MX28/m-p/354000#M49397</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-01-19T01:23:40Z</dc:date>
    </item>
  </channel>
</rss>

