topic Re: Question, i.MX6Q ECSPI in i.MX Processors

Question, i.MX6Q ECSPI

Aemj — Sun, 18 Jan 2015 14:36:58 GMT

Dear team,

My customer is facing the issue that ECSPI module of i.MX6Q cannot communicate with a external SPI device on their proto-board.

They use i.MX6Q ECSPI as slave and the external device is the master.

Because the external device is the only SPI device, they do not use SS.

The SS pin of i.MX6 is open.

The customer’s configuration is as below.

ECSPI5_CONREG = 0x0170_D101

ECSPI5_CONFREG = 0x0000_0001

ECSPI5_INTREG = 0x0000_0028

ECSPI5_DMAREG = 0x0000_0000

ECSPI5_STATREG = 0x0000_0003

Could you give me advice on the cause of this issue?

Thanks,

Miyamoto

igorpadykov — Sun, 18 Jan 2015 15:09:54 GMT

Hi AVNET JAPAN FAE

SS should be used in slave mode as describes

sect.21.4.2 Slave Mode IMX6DQRM :

In this configuration, Chip Select (SS) becomes an input signal, and is used to control

data transfers through the Shift register, as well as to load/store the data FIFO.

Also below one can find slave mode usage examples

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

Aemj — Mon, 19 Jan 2015 01:23:17 GMT

Dear Igor,

Thanks for your prompt reply.

Can I understand that SS pin of i.MX6 should be connected to external device even if the SPI is used for peer-to-peer communication?

BR,

Miyamoto

igorpadykov — Mon, 19 Jan 2015 11:26:38 GMT

Hi Miyamoto

yes SS pin of i.MX6 should be connected to external device

even if the SPI is used for peer-to-peer communication.

Best regards

igor