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    <title>i.MX ProcessorsのトピックRe: Internal boot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353308#M49273</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is set, SRC_BOOT_CFG will be configured during booting.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;When &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is clear, GPIO will be configuring.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Example; EIM_DA1&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em; color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;When &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is set, then EIM_DA1 will be set as SRC_BOOT_CFG01&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;When &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is clear, then &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;EIM_DA1 will be set as GPIO3_IO01&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Above two examples are correct ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 01 Oct 2014 02:49:38 GMT</pubDate>
    <dc:creator>mohammedazlum</dc:creator>
    <dc:date>2014-10-01T02:49:38Z</dc:date>
    <item>
      <title>Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353304#M49269</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have used iMX6Q peocessor for our project.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;I wanted to use internal boot mode insted of efuse mode. For internal&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;boot mode 0b10 value need to be set BOOT_MODE[1:0] register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;When i select internal boot, again i have two options;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;1) BT_FUSE_SEL = 1 booting sources are controlled by eFuses.&lt;/P&gt;&lt;P&gt;2) BT_FUSE_SEL = 0 booting sources are controlled by GPIO override.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;So the question is,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;1) I hope the values of BOOT_MODE[1:0] will be set by boot mode &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;setting switch externally.If so, when I set 00 in BOOT_MODE[1:0] by &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;using external switch whether board will go to eFuse boot mode ? If it is goes to eFues mode, the CPU will be boot always from eFuses directly ? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;or &lt;/P&gt;&lt;P&gt;explain when the values in BOOT_MODE[1:0]&amp;nbsp; will be valid ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; font-size: 10pt;"&gt;2) When the values of BT_FUSE_SEL will be set? during &lt;/SPAN&gt;programming&lt;SPAN style="line-height: 1.5em; font-size: 10pt;"&gt; the &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;board or else when ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;3) What is GPIO override mode ? Whether do we need to configure the &lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;EIM siganls as GPIO or BOOT_CFG in GPIO override mode ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Azlum&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Sep 2014 07:59:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353304#M49269</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-09-29T07:59:42Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353305#M49270</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="padding: 0 0 24.0pt 0;"&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Please look at my comments below.&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&lt;BR /&gt;1. &lt;BR /&gt;&amp;gt; I hope the values of BOOT_MODE[1:0] will be set by boot mode setting switch externally.&lt;BR /&gt;&amp;gt; If so, when I set 00 in BOOT_MODE[1:0] by using external switch whether board will go to &lt;BR /&gt;&amp;gt; eFuse boot mode ?&amp;nbsp; […]&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt; &lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; BOOT_MODE[1:0] = 00 provides only two possible scenarios for boot, controlled by the BT_FUSE_SEL :&lt;BR /&gt; “If BT_FUSE_SEL = 0, indicating that the boot device (for example, Flash, SD/MMC) has not &lt;BR /&gt;yet been programmed, the boot flow jumps directly to the Serial Downloader. &lt;BR /&gt;If BT_FUSE_SEL = 1, the normal boot flow is followed, where the ROM&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding: 0 0 24.0pt 0;"&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;attempts to boot from the selected boot device.”&lt;BR /&gt; &lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;2. &lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;gt; When the values of BT_FUSE_SEL will be set? during programming the board or else when ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding: 0 0 24.0pt 0;"&gt; &lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt; Yes, BT_FUSE_SEL may be burned by customers when they want (but only once) via the &lt;BR /&gt; Serial Downloader. &lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding: 0 0 24.0pt 0;"&gt;&amp;nbsp; &lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;3.&lt;BR /&gt; &amp;gt; What is GPIO override mode ? Whether do we need to configure the EIM signals as GPIO &lt;BR /&gt; &amp;gt; or BOOT_CFG in GPIO override mode ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding: 0 0 24.0pt 0;"&gt; &lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; For debugging it may be convenient to use external switches to select different boot modes.&lt;BR /&gt; GPIO override mode is intended for such case. No need to configure EIM signal for it. It is done&lt;BR /&gt; automatically when&amp;nbsp; BOOT_MODE[1:0] = 10&amp;nbsp; and BT_FUSE_SEL = 0.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Sep 2014 10:49:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353305#M49270</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-09-29T10:49:37Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353306#M49271</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;STRONG&gt;Dear Yuri,&lt;/STRONG&gt; Thanks for the reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As per your reply, can you go through below reply and share the feedback.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;During programming, we can set &lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: 10pt; font-family: Verdana, sans-serif;"&gt;BT_FUSE_SEL =1, device will try to boot always from one &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif;"&gt;booting&lt;/SPAN&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: 10pt; font-family: Verdana, sans-serif;"&gt; media [ MMC/SD/SPI].&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: 10pt; font-family: Verdana, sans-serif;"&gt;When we set &lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif; font-size: small;"&gt;BT_FUSE_SEL =0, device can boot from any booting source according to the boot selection switch position. Consider for SPI 110XXXXX is the boot selecting positions.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: small; font-family: Verdana, sans-serif;"&gt;So the question is, Why &lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif; font-size: small;"&gt;BT_FUSE_SEL=0 called GPIO override mode ? When you set &lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif; font-size: small;"&gt;BT_FUSE_SEL =0 (The pins not at all configuring as GPIO purpose). Example if I set &lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif; font-size: small;"&gt;BT_FUSE_SEL=0, then &lt;/SPAN&gt;EIM_DA0 will be configured as GPIO3_IO00 ? &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;STRONG style=": ; line-height: 1.5em; color: #3d3d3d; font-size: small; font-family: Verdana, sans-serif;"&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Regards,&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Azlum&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: small; font-family: Verdana, sans-serif;"&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: 10pt; font-family: Verdana, sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; color: #3d3d3d; font-size: 10pt; font-family: Verdana, sans-serif;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 04:04:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353306#M49271</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-09-30T04:04:31Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353307#M49272</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Section 60.6.3.1 (BOOT_MODE Pin Latching) and Figure 60-6 (Boot mode information)&amp;nbsp; &lt;BR /&gt;of the i.MX6 DQ Reference Manual clarifies the issue : &lt;/P&gt;&lt;P&gt;"The exact boot sequence is controlled by the values of the BOOT_MODE pins on this &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;device.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;The value of the BOOT_MODE pins will be latched after the OCOTP_CTRL asserts the&lt;/P&gt;&lt;P&gt;fuse read completion flag. After latching, the values of the BOOT_MODE pins are used&lt;/P&gt;&lt;P&gt;to determine the booting options of the core as described in the SRC_SBMRx registers.&lt;/P&gt;&lt;P&gt;The boot mode general purpose bits can be provided to the SRC from either e-fuses or&lt;/P&gt;&lt;P&gt;GPIO signals. The gpio_bt_sel e-fuse defines the source to be used to derive the boot&lt;/P&gt;&lt;P&gt;information. When gpio_bt_sel is set, e-fuses are used. When cleared, GPIO signals are&lt;/P&gt;&lt;P&gt;used."&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Basically no need to configure pins for GPIO mode, since just pin states are sampled. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Sep 2014 05:43:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353307#M49272</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-09-30T05:43:52Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353308#M49273</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is set, SRC_BOOT_CFG will be configured during booting.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;When &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is clear, GPIO will be configuring.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Example; EIM_DA1&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em; color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;When &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is set, then EIM_DA1 will be set as SRC_BOOT_CFG01&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;When &lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; gpio_bt_sel is clear, then &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;EIM_DA1 will be set as GPIO3_IO01&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Above two examples are correct ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Oct 2014 02:49:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353308#M49273</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-10-01T02:49:38Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353309#M49274</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Azlum, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; During POR assertion pin configuration is not defined yet, therefore &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;gpio_bt_sel &lt;BR /&gt;&lt;/SPAN&gt;just defines what data are read to SRC_SBMR1 register (which is used as &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;SRC_BOOT_CFG source&lt;/SPAN&gt;) :&lt;/P&gt;&lt;P&gt;EIM pins or fuses. After reset negation, pin states are configured for their default state.&lt;BR /&gt;Please refer to the Datasheet(s) what is defalut state. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Oct 2014 03:33:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353309#M49274</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-10-01T03:33:08Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353310#M49275</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yuri, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which is GPIO Overrride pins, when &lt;SPAN style="color: #3d3d3d; font-family: Verdana, sans-serif;"&gt;set &lt;/SPAN&gt;&lt;SPAN style="font-size: small; font-family: Verdana, sans-serif; color: #3d3d3d;"&gt;BT_FUSE_SEL =0&lt;/SPAN&gt;&amp;nbsp; condition? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Oct 2014 03:49:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353310#M49275</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-10-01T03:49:47Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353311#M49276</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp; Please refer to Table 8-3 (GPIO Override Contact Assignments) and &lt;/P&gt;&lt;P&gt;Table 8-4 (Boot Options Control Selection) of the i.MX6 DQ Reference &lt;BR /&gt;Manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; ~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Oct 2014 04:27:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353311#M49276</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-10-01T04:27:16Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353312#M49277</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have checked &lt;STRONG&gt;8.3.2 GPIO Boot Overrides&lt;/STRONG&gt; in RM. Please confirm below image. &lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="GPIO Override Pins _ eFuse pins.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/46371iCCA447746D5F30F0/image-size/large?v=v2&amp;amp;px=999" role="button" title="GPIO Override Pins _ eFuse pins.jpg" alt="GPIO Override Pins _ eFuse pins.jpg" /&gt;&lt;/span&gt;&lt;BR /&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Oct 2014 13:44:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353312#M49277</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-10-01T13:44:40Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353313#M49278</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This is just a terminilogy : &lt;BR /&gt;package pins, named EIM_DAx (also called as GPIO overridepins),&amp;nbsp; &lt;BR /&gt;and BOOT_CFGy as logical name of boot fuses.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Oct 2014 05:08:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353313#M49278</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-10-02T05:08:05Z</dc:date>
    </item>
    <item>
      <title>Re: Internal boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353314#M49279</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the support... &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your all explanations are very useful to me....&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Azlum&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Oct 2014 07:11:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-boot/m-p/353314#M49279</guid>
      <dc:creator>mohammedazlum</dc:creator>
      <dc:date>2014-10-02T07:11:26Z</dc:date>
    </item>
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