i.MX ProcessorsのトピックRe: Question, i.MX6Q SSI RX by SDMA

Question, i.MX6Q SSI RX by SDMA

Aemj — Thu, 26 Mar 2015 05:26:48 GMT

Dear team,

My customer is facing the issue that the RX from SSI by SDMA does not work on their custom board.

They use SDMA for TX/RX from/to SSI of i.MX6.

TX by SDMA works fine but RX does not work.

They use AUDMUX, SSI2 and AUD3 are used to connect with external DSP.

TXD, RXD,TXFS and TXC pins are used.

The following register dump is captured when the TX completion interrupt occurs.

i.MX6 is expected to receive audio data from external DSP at that time but no data has been received.

SSI2_SRX:0x00000000

SSI2_SISR:0x000011e1

SSI2_SCR:0x000000bf

SSI2_SIER:0x005000f

SSI2_STCR:0x000001e9

SSI2_SRCR:0x00000189

SSI2_SFCSR:0x00880788

AUDMUX

PTCR2:0x94842800

PDCR2:0x00004000

PTCR3:0x8c421800

PDCR3:0x00002000

Do you have any ideas about the cause of this issue?

Thanks,

Miyamoto

Re: Question, i.MX6Q SSI RX by SDMA

Aemj — Fri, 27 Mar 2015 06:38:41 GMT

Hi team,

Please let me know whether the customer's AUDMUX register settings(PTCR2, PDCR2, PTCR3, PDCR3) are correct.

As I wrote in previous, 4 wires(TXD, RXD, TXFS, TXC) of AUDMUX Port2(SSI2) and Port3(AUD3) are used for connection to external DSP.

Thanks,

Miyamoto

Re: Question, i.MX6Q SSI RX by SDMA

Yuri — Mon, 13 Apr 2015 10:01:58 GMT

What is connection scheme between i.MX6 (AUDMUX) and the DSP ?

PTCR2 is configured so, that the DSP (connected to AUD3) should provide
Receive Frame Sync and Receive Clock : is it so ? Is the DSP configured
in such mode ?

RXDSEL[2:0] of PDCR2 should be set as 3 (2 in the case) – in order to
to get data from the DSP via AUD3.

Have a great day,
Yuri

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