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    <title>i.MX Processors中的主题 SPI for NOR Flash - Maximum addressable range</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SPI-for-NOR-Flash-Maximum-addressable-range/m-p/350532#M48754</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If one wanted to add flash memory to an i.MX6S with a SPI nor flash, what is the limiting factor for the maximum addressable memory?&amp;nbsp; I see references in the manual that state a 16k memory size size for SPI boot, and I also see a setting for 16-bit or 24-bit (but I'm not sure this refers to the address bits).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="16kB.GIF.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50950i4B68C4CC851F36E5/image-size/large?v=v2&amp;amp;px=999" role="button" title="16kB.GIF.gif" alt="16kB.GIF.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="24-bit.GIF.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50951iAF9E6DE47578EB76/image-size/large?v=v2&amp;amp;px=999" role="button" title="24-bit.GIF.gif" alt="24-bit.GIF.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 02 Mar 2015 19:36:49 GMT</pubDate>
    <dc:creator>dvona</dc:creator>
    <dc:date>2015-03-02T19:36:49Z</dc:date>
    <item>
      <title>SPI for NOR Flash - Maximum addressable range</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-for-NOR-Flash-Maximum-addressable-range/m-p/350532#M48754</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If one wanted to add flash memory to an i.MX6S with a SPI nor flash, what is the limiting factor for the maximum addressable memory?&amp;nbsp; I see references in the manual that state a 16k memory size size for SPI boot, and I also see a setting for 16-bit or 24-bit (but I'm not sure this refers to the address bits).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="16kB.GIF.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50950i4B68C4CC851F36E5/image-size/large?v=v2&amp;amp;px=999" role="button" title="16kB.GIF.gif" alt="16kB.GIF.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="24-bit.GIF.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50951iAF9E6DE47578EB76/image-size/large?v=v2&amp;amp;px=999" role="button" title="24-bit.GIF.gif" alt="24-bit.GIF.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Mar 2015 19:36:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-for-NOR-Flash-Maximum-addressable-range/m-p/350532#M48754</guid>
      <dc:creator>dvona</dc:creator>
      <dc:date>2015-03-02T19:36:49Z</dc:date>
    </item>
    <item>
      <title>Re: SPI for NOR Flash - Maximum addressable range</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-for-NOR-Flash-Maximum-addressable-range/m-p/350533#M48755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Dan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is no limitation to the memory size on the SPI, of course the bigger the memory, the slower it'll become.&lt;/P&gt;&lt;P&gt;The table you are showing refers to the required memory for bootloader&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Sergio&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 16:49:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-for-NOR-Flash-Maximum-addressable-range/m-p/350533#M48755</guid>
      <dc:creator>SergioSolis</dc:creator>
      <dc:date>2015-03-12T16:49:12Z</dc:date>
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