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    <title>topic Re: why is linux i.mx6  uart dcedte setup in imx_set_termios in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349785#M48538</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Unfortunately time constraints prevent me from doing this.&amp;nbsp; We reversed the connections on the uart on the PCB, abandoned using the additional flow control bits and use DCE mode now.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 24 Apr 2015 18:59:29 GMT</pubDate>
    <dc:creator>andrewdyer</dc:creator>
    <dc:date>2015-04-24T18:59:29Z</dc:date>
    <item>
      <title>why is linux i.mx6  uart dcedte setup in imx_set_termios</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349781#M48534</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to set up the i.MX6 uart1 port as a DTE port to connect to a modem with full modem control.&amp;nbsp; Linux kernel is 3.10.17-1.0.2_ga.&amp;nbsp; I am seeing odd behaviour for the DCEDTE bit.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I add the fsl,dte-mode property to my device tree, I see the property reflected in the kernel view of the device tree (/proc/device-tree/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000/fsl,dte-mode file exists).&amp;nbsp; If I look at the UART1_UFCR register, the DCEDTE bit is not set.&amp;nbsp; At this no software has the port open (co console, no getty, no ppp, no autodialer).&amp;nbsp; When I check the IOMUXC all of the uart IO selected for uart1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# /unit_tests/memtool UART1.UFCR&lt;/P&gt;&lt;P&gt;SOC: i.MX6DL&lt;/P&gt;&lt;P&gt;UART1&amp;nbsp;&amp;nbsp;&amp;nbsp; Addr:0x2020000&lt;/P&gt;&lt;P&gt;&amp;nbsp; UART1.UFCR Addr:0x02020090 Value:0x00000801 -&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UART1.UFCR.RXTL(0..5)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :0x1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Receiver Trigger Level .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UART1.UFCR.DCEDTE(6..6)&amp;nbsp;&amp;nbsp;&amp;nbsp; :0x0&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;lt;---------------------&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DCE/DTE mode select .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UART1.UFCR.RFDIV(7..9)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Reference Frequency Divider.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UART1.UFCR.TXTL(10..15)&amp;nbsp;&amp;nbsp;&amp;nbsp; :0x2&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Transmitter Trigger Level .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Digging in drivers/tty/serial/imx.c it looks like the DCEDTE bit is set in imx_set_termios().&amp;nbsp; As far as I can tell this function isn't called unless the port is opened.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think this is a bug - DCEDTE affects the IOMUX direction for all the port bits.&amp;nbsp; It seems to me that it should be set much earlier, preserved across the whole driver, and set regardless if the port is opened or not to minimize any IO contention.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Mar 2015 17:00:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349781#M48534</guid>
      <dc:creator>andrewdyer</dc:creator>
      <dc:date>2015-03-25T17:00:30Z</dc:date>
    </item>
    <item>
      <title>Re: why is linux i.mx6  uart dcedte setup in imx_set_termios</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349782#M48535</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Basically it is the right approach to implement UART features&amp;nbsp; through &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;the Device Tree, in order to provide all the driver settings on the Device &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Tree and avoid conflicts by setting the register manually outside it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Perhaps, You would need to modify the driver (and - maybe - add the &lt;BR /&gt; required feature to the Device Tree for selected UART port.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 05:25:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349782#M48535</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-04-09T05:25:58Z</dc:date>
    </item>
    <item>
      <title>Re: why is linux i.mx6  uart dcedte setup in imx_set_termios</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349783#M48536</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm not saying implementing the feature via device tree is wrong.&amp;nbsp; I think the implementation of the IO setup in the driver is in the wrong place and should happen as soon as possible.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 14:22:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349783#M48536</guid>
      <dc:creator>andrewdyer</dc:creator>
      <dc:date>2015-04-09T14:22:39Z</dc:date>
    </item>
    <item>
      <title>Re: why is linux i.mx6  uart dcedte setup in imx_set_termios</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349784#M48537</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andrew,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you prepare a patch (against kernel 3.19 or 4.0-rc7) and submit it to linux-serial mailing list for review and discuss?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fabio Estevam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Apr 2015 15:45:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349784#M48537</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2015-04-09T15:45:46Z</dc:date>
    </item>
    <item>
      <title>Re: why is linux i.mx6  uart dcedte setup in imx_set_termios</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349785#M48538</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Unfortunately time constraints prevent me from doing this.&amp;nbsp; We reversed the connections on the uart on the PCB, abandoned using the additional flow control bits and use DCE mode now.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Apr 2015 18:59:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/why-is-linux-i-mx6-uart-dcedte-setup-in-imx-set-termios/m-p/349785#M48538</guid>
      <dc:creator>andrewdyer</dc:creator>
      <dc:date>2015-04-24T18:59:29Z</dc:date>
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